From e1919d3b0666a149fbfa0514ba6d6ce40abdfdab Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Thu, 15 Dec 2022 15:29:43 -0800 Subject: [PATCH] Add config.h includes directly to source files instead of relying on header chaining This step is to ensure that removing config.h out of headers will not cause regressions. --- fesvr/elfloader.cc | 1 + fesvr/htif.cc | 1 + fesvr/syscall.cc | 1 + riscv/csrs.cc | 1 + riscv/dts.cc | 1 + riscv/execute.cc | 1 + riscv/mmu.cc | 1 + spike_dasm/spike-dasm.cc | 1 + spike_main/spike-log-parser.cc | 1 + spike_main/spike.cc | 1 + 10 files changed, 10 insertions(+) diff --git a/fesvr/elfloader.cc b/fesvr/elfloader.cc index 192de65a..eef19b43 100644 --- a/fesvr/elfloader.cc +++ b/fesvr/elfloader.cc @@ -1,5 +1,6 @@ // See LICENSE for license details. +#include "config.h" #include "elf.h" #include "memif.h" #include "byteorder.h" diff --git a/fesvr/htif.cc b/fesvr/htif.cc index 29eb7d86..80ab69b5 100644 --- a/fesvr/htif.cc +++ b/fesvr/htif.cc @@ -1,5 +1,6 @@ // See LICENSE for license details. +#include "config.h" #include "htif.h" #include "rfb.h" #include "elfloader.h" diff --git a/fesvr/syscall.cc b/fesvr/syscall.cc index 19c9f381..875ffb73 100644 --- a/fesvr/syscall.cc +++ b/fesvr/syscall.cc @@ -1,5 +1,6 @@ // See LICENSE for license details. +#include "config.h" #include "syscall.h" #include "htif.h" #include "byteorder.h" diff --git a/riscv/csrs.cc b/riscv/csrs.cc index 15a17d4e..48b3e568 100644 --- a/riscv/csrs.cc +++ b/riscv/csrs.cc @@ -1,5 +1,6 @@ // See LICENSE for license details. +#include "config.h" // For std::any_of #include diff --git a/riscv/dts.cc b/riscv/dts.cc index e1905aef..46128862 100644 --- a/riscv/dts.cc +++ b/riscv/dts.cc @@ -1,5 +1,6 @@ // See LICENSE for license details. +#include "config.h" #include "dts.h" #include "libfdt.h" #include "platform.h" diff --git a/riscv/execute.cc b/riscv/execute.cc index 3c627a44..b5e3450b 100644 --- a/riscv/execute.cc +++ b/riscv/execute.cc @@ -1,5 +1,6 @@ // See LICENSE for license details. +#include "config.h" #include "processor.h" #include "mmu.h" #include "disasm.h" diff --git a/riscv/mmu.cc b/riscv/mmu.cc index fa873d9e..99dd190f 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -1,5 +1,6 @@ // See LICENSE for license details. +#include "config.h" #include "mmu.h" #include "arith.h" #include "simif.h" diff --git a/spike_dasm/spike-dasm.cc b/spike_dasm/spike-dasm.cc index 62e72124..3e42df5b 100644 --- a/spike_dasm/spike-dasm.cc +++ b/spike_dasm/spike-dasm.cc @@ -6,6 +6,7 @@ // enclosed hexadecimal number, interpreted as a RISC-V // instruction. +#include "config.h" #include "disasm.h" #include "extension.h" #include diff --git a/spike_main/spike-log-parser.cc b/spike_main/spike-log-parser.cc index e5511e53..adf6b686 100644 --- a/spike_main/spike-log-parser.cc +++ b/spike_main/spike-log-parser.cc @@ -5,6 +5,7 @@ // in its inputs, then output the RISC-V instruction with the disassembly // enclosed hexadecimal number. +#include "config.h" #include #include #include diff --git a/spike_main/spike.cc b/spike_main/spike.cc index f183e5b8..b2040916 100644 --- a/spike_main/spike.cc +++ b/spike_main/spike.cc @@ -1,5 +1,6 @@ // See LICENSE for license details. +#include "config.h" #include "cfg.h" #include "sim.h" #include "mmu.h"