diff --git a/riscv/insns/absw.h b/riscv/insns/absw.h
new file mode 100644
index 00000000..e10240ff
--- /dev/null
+++ b/riscv/insns/absw.h
@@ -0,0 +1,5 @@
+require_rv64;
+require_extension('P');
+reg_t s1_w = sext32(RS1);
+reg_t result = (int32_t(s1_w) < 0) ? -s1_w : s1_w;
+WRITE_RD(sext_xlen(result));
diff --git a/riscv/insns/clsw.h b/riscv/insns/clsw.h
new file mode 100644
index 00000000..651f28af
--- /dev/null
+++ b/riscv/insns/clsw.h
@@ -0,0 +1,11 @@
+require_rv64;
+require_extension('P');
+reg_t x = 32 - 1;
+reg_t msb = (RS1 >> (32 - 1)) & 1;
+for (int i = 0; i < 32 - 1; i++) {
+  if (msb != ((RS1 >> (32 - i - 2)) & 1)) {
+    x = i;
+    break;
+  }
+}
+WRITE_RD(sext_xlen(x));
diff --git a/riscv/insns/macc_w00.h b/riscv/insns/macc_w00.h
new file mode 100644
index 00000000..2f82736d
--- /dev/null
+++ b/riscv/insns/macc_w00.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(RD + sext32(RS1) * sext32(RS2));
diff --git a/riscv/insns/macc_w01.h b/riscv/insns/macc_w01.h
new file mode 100644
index 00000000..ab99bd81
--- /dev/null
+++ b/riscv/insns/macc_w01.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(RD + sext32(RS1) * sext32(RS2 >> 32));
diff --git a/riscv/insns/macc_w11.h b/riscv/insns/macc_w11.h
new file mode 100644
index 00000000..b3d76f08
--- /dev/null
+++ b/riscv/insns/macc_w11.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(RD + sext32(RS1 >> 32) * sext32(RS2 >> 32));
diff --git a/riscv/insns/maccsu_w00.h b/riscv/insns/maccsu_w00.h
new file mode 100644
index 00000000..d689c5b5
--- /dev/null
+++ b/riscv/insns/maccsu_w00.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(RD + sext32(RS1) * zext32(RS2));
diff --git a/riscv/insns/maccsu_w11.h b/riscv/insns/maccsu_w11.h
new file mode 100644
index 00000000..6a75ce7b
--- /dev/null
+++ b/riscv/insns/maccsu_w11.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(RD + sext32(RS1 >> 32) * zext32(RS2 >> 32));
diff --git a/riscv/insns/maccu_w00.h b/riscv/insns/maccu_w00.h
new file mode 100644
index 00000000..12c3cb6b
--- /dev/null
+++ b/riscv/insns/maccu_w00.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(RD + zext32(RS1) * zext32(RS2));
diff --git a/riscv/insns/maccu_w01.h b/riscv/insns/maccu_w01.h
new file mode 100644
index 00000000..b469c387
--- /dev/null
+++ b/riscv/insns/maccu_w01.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(RD + zext32(RS1) * zext32(RS2 >> 32));
diff --git a/riscv/insns/maccu_w11.h b/riscv/insns/maccu_w11.h
new file mode 100644
index 00000000..eca1f711
--- /dev/null
+++ b/riscv/insns/maccu_w11.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(RD + zext32(RS1 >> 32) * zext32(RS2 >> 32));
diff --git a/riscv/insns/mqacc_w00.h b/riscv/insns/mqacc_w00.h
new file mode 100644
index 00000000..677b9bc4
--- /dev/null
+++ b/riscv/insns/mqacc_w00.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(RD + (((sreg_t)P_FIELD(RS1, 0, 32) * P_FIELD(RS2, 0, 32)) >> 31));
diff --git a/riscv/insns/mqacc_w01.h b/riscv/insns/mqacc_w01.h
new file mode 100644
index 00000000..d03020d5
--- /dev/null
+++ b/riscv/insns/mqacc_w01.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(RD + (((sreg_t)P_FIELD(RS1, 0, 32) * P_FIELD(RS2, 1, 32)) >> 31));
diff --git a/riscv/insns/mqacc_w11.h b/riscv/insns/mqacc_w11.h
new file mode 100644
index 00000000..30f93a8e
--- /dev/null
+++ b/riscv/insns/mqacc_w11.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(RD + (((sreg_t)P_FIELD(RS1, 1, 32) * P_FIELD(RS2, 1, 32)) >> 31));
diff --git a/riscv/insns/mqracc_w00.h b/riscv/insns/mqracc_w00.h
new file mode 100644
index 00000000..6426aa5c
--- /dev/null
+++ b/riscv/insns/mqracc_w00.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(RD + (((sreg_t)P_FIELD(RS1, 0, 32) * P_FIELD(RS2, 0, 32) + 0x40000000) >> 31));
diff --git a/riscv/insns/mqracc_w01.h b/riscv/insns/mqracc_w01.h
new file mode 100644
index 00000000..ac315532
--- /dev/null
+++ b/riscv/insns/mqracc_w01.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(RD + (((sreg_t)P_FIELD(RS1, 0, 32) * P_FIELD(RS2, 1, 32) + 0x40000000) >> 31));
diff --git a/riscv/insns/mqracc_w11.h b/riscv/insns/mqracc_w11.h
new file mode 100644
index 00000000..0e9386c3
--- /dev/null
+++ b/riscv/insns/mqracc_w11.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(RD + (((sreg_t)P_FIELD(RS1, 1, 32) * P_FIELD(RS2, 1, 32) + 0x40000000) >> 31));
diff --git a/riscv/insns/mul_w00.h b/riscv/insns/mul_w00.h
new file mode 100644
index 00000000..a338218e
--- /dev/null
+++ b/riscv/insns/mul_w00.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(sext32(RS1) * sext32(RS2));
diff --git a/riscv/insns/mul_w01.h b/riscv/insns/mul_w01.h
new file mode 100644
index 00000000..23c7f73c
--- /dev/null
+++ b/riscv/insns/mul_w01.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(sext32(RS1) * sext32(RS2 >> 32));
diff --git a/riscv/insns/mul_w11.h b/riscv/insns/mul_w11.h
new file mode 100644
index 00000000..d0233c11
--- /dev/null
+++ b/riscv/insns/mul_w11.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(sext32(RS1 >> 32) * sext32(RS2 >> 32));
diff --git a/riscv/insns/mulsu_w00.h b/riscv/insns/mulsu_w00.h
new file mode 100644
index 00000000..0323688d
--- /dev/null
+++ b/riscv/insns/mulsu_w00.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(sext32(RS1) * zext32(RS2));
diff --git a/riscv/insns/mulsu_w11.h b/riscv/insns/mulsu_w11.h
new file mode 100644
index 00000000..21f0c004
--- /dev/null
+++ b/riscv/insns/mulsu_w11.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(sext32(RS1 >> 32) * zext32(RS2 >> 32));
diff --git a/riscv/insns/mulu_w00.h b/riscv/insns/mulu_w00.h
new file mode 100644
index 00000000..ce96de9c
--- /dev/null
+++ b/riscv/insns/mulu_w00.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(zext32(RS1) * zext32(RS2));
diff --git a/riscv/insns/mulu_w01.h b/riscv/insns/mulu_w01.h
new file mode 100644
index 00000000..ee911eee
--- /dev/null
+++ b/riscv/insns/mulu_w01.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(zext32(RS1) * zext32(RS2 >> 32));
diff --git a/riscv/insns/mulu_w11.h b/riscv/insns/mulu_w11.h
new file mode 100644
index 00000000..2111bebc
--- /dev/null
+++ b/riscv/insns/mulu_w11.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(zext32(RS1 >> 32) * zext32(RS2 >> 32));
diff --git a/riscv/insns/pm2add_w.h b/riscv/insns/pm2add_w.h
new file mode 100644
index 00000000..33efbd63
--- /dev/null
+++ b/riscv/insns/pm2add_w.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_REDUCTION_LOOP(64, 32, false, false, {
+  p_res += (sreg_t)p_rs1 * p_rs2;
+}
+)
diff --git a/riscv/insns/pm2add_wx.h b/riscv/insns/pm2add_wx.h
new file mode 100644
index 00000000..ea8dc10e
--- /dev/null
+++ b/riscv/insns/pm2add_wx.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_REDUCTION_CROSS_LOOP(64, 32, false, false, {
+  p_res += (sreg_t)p_rs1 * p_rs2;
+}
+)
diff --git a/riscv/insns/pm2adda_w.h b/riscv/insns/pm2adda_w.h
new file mode 100644
index 00000000..3bbb37ea
--- /dev/null
+++ b/riscv/insns/pm2adda_w.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_REDUCTION_LOOP(64, 32, true, false, {
+  p_res += (sreg_t)p_rs1 * p_rs2;
+}
+)
diff --git a/riscv/insns/pm2adda_wx.h b/riscv/insns/pm2adda_wx.h
new file mode 100644
index 00000000..02bd918b
--- /dev/null
+++ b/riscv/insns/pm2adda_wx.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_REDUCTION_CROSS_LOOP(64, 32, true, false, {
+  p_res += (sreg_t)p_rs1 * p_rs2;
+}
+)
diff --git a/riscv/insns/pm2addasu_w.h b/riscv/insns/pm2addasu_w.h
new file mode 100644
index 00000000..4168bae3
--- /dev/null
+++ b/riscv/insns/pm2addasu_w.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_REDUCTION_SULOOP(64, 32, true, false, {
+  p_res += (sreg_t)p_rs1 * p_rs2;
+}
+)
diff --git a/riscv/insns/pm2addau_w.h b/riscv/insns/pm2addau_w.h
new file mode 100644
index 00000000..ecc60c49
--- /dev/null
+++ b/riscv/insns/pm2addau_w.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_REDUCTION_ULOOP(64, 32, true, false, {
+  p_res += (reg_t)p_rs1 * p_rs2;
+}
+)
diff --git a/riscv/insns/pm2addsu_w.h b/riscv/insns/pm2addsu_w.h
new file mode 100644
index 00000000..8b36ddf2
--- /dev/null
+++ b/riscv/insns/pm2addsu_w.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_REDUCTION_SULOOP(64, 32, false, false, {
+  p_res += (sreg_t)p_rs1 * p_rs2;
+}
+)
diff --git a/riscv/insns/pm2addu_w.h b/riscv/insns/pm2addu_w.h
new file mode 100644
index 00000000..fb9b4bc8
--- /dev/null
+++ b/riscv/insns/pm2addu_w.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_REDUCTION_ULOOP(64, 32, false, false, {
+  p_res += (reg_t)p_rs1 * p_rs2;
+}
+)
diff --git a/riscv/insns/pm2sub_w.h b/riscv/insns/pm2sub_w.h
new file mode 100644
index 00000000..4e7c8307
--- /dev/null
+++ b/riscv/insns/pm2sub_w.h
@@ -0,0 +1,8 @@
+require_rv64;
+P_REDUCTION_LOOP(64, 32, false, false, {
+  if (j & 1)
+    p_res -= (sreg_t)p_rs1 * p_rs2;
+  else
+    p_res += (sreg_t)p_rs1 * p_rs2;
+}
+)
diff --git a/riscv/insns/pm2sub_wx.h b/riscv/insns/pm2sub_wx.h
new file mode 100644
index 00000000..f8b300f2
--- /dev/null
+++ b/riscv/insns/pm2sub_wx.h
@@ -0,0 +1,8 @@
+require_rv64;
+P_REDUCTION_CROSS_LOOP(64, 32, false, false, {
+  if (j & 1)
+    p_res -= (sreg_t)p_rs1 * p_rs2;
+  else
+    p_res += (sreg_t)p_rs1 * p_rs2;
+}
+)
diff --git a/riscv/insns/pm2suba_w.h b/riscv/insns/pm2suba_w.h
new file mode 100644
index 00000000..f3f4dc96
--- /dev/null
+++ b/riscv/insns/pm2suba_w.h
@@ -0,0 +1,8 @@
+require_rv64;
+P_REDUCTION_LOOP(64, 32, true, false, {
+  if (j & 1)
+    p_res -= (sreg_t)p_rs1 * p_rs2;
+  else
+    p_res += (sreg_t)p_rs1 * p_rs2;
+}
+)
diff --git a/riscv/insns/pm2suba_wx.h b/riscv/insns/pm2suba_wx.h
new file mode 100644
index 00000000..1a597259
--- /dev/null
+++ b/riscv/insns/pm2suba_wx.h
@@ -0,0 +1,8 @@
+require_rv64;
+P_REDUCTION_CROSS_LOOP(64, 32, true, false, {
+  if (j & 1)
+    p_res -= (sreg_t)p_rs1 * p_rs2;
+  else
+    p_res += (sreg_t)p_rs1 * p_rs2;
+}
+)
diff --git a/riscv/insns/pm4add_h.h b/riscv/insns/pm4add_h.h
new file mode 100644
index 00000000..ea9a82bf
--- /dev/null
+++ b/riscv/insns/pm4add_h.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_REDUCTION_LOOP(64, 16, false, false, {
+  p_res += (sreg_t)p_rs1 * p_rs2;
+}
+)
diff --git a/riscv/insns/pm4adda_h.h b/riscv/insns/pm4adda_h.h
new file mode 100644
index 00000000..a3498cc4
--- /dev/null
+++ b/riscv/insns/pm4adda_h.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_REDUCTION_LOOP(64, 16, true, false, {
+  p_res += (sreg_t)p_rs1 * p_rs2;
+}
+)
diff --git a/riscv/insns/pm4addasu_h.h b/riscv/insns/pm4addasu_h.h
new file mode 100644
index 00000000..d0aafb61
--- /dev/null
+++ b/riscv/insns/pm4addasu_h.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_REDUCTION_SULOOP(64, 16, true, false, {
+  p_res += (sreg_t)p_rs1 * p_rs2;
+}
+)
diff --git a/riscv/insns/pm4addau_h.h b/riscv/insns/pm4addau_h.h
new file mode 100644
index 00000000..1ce56684
--- /dev/null
+++ b/riscv/insns/pm4addau_h.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_REDUCTION_ULOOP(64, 16, true, false, {
+  p_res += (reg_t)p_rs1 * p_rs2;
+}
+)
diff --git a/riscv/insns/pm4addsu_h.h b/riscv/insns/pm4addsu_h.h
new file mode 100644
index 00000000..1c0c6d8b
--- /dev/null
+++ b/riscv/insns/pm4addsu_h.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_REDUCTION_SULOOP(64, 16, false, false, {
+  p_res += (sreg_t)p_rs1 * p_rs2;
+}
+)
diff --git a/riscv/insns/pm4addu_h.h b/riscv/insns/pm4addu_h.h
new file mode 100644
index 00000000..b3ce1aa5
--- /dev/null
+++ b/riscv/insns/pm4addu_h.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_REDUCTION_ULOOP(64, 16, false, false, {
+  p_res += (reg_t)p_rs1 * p_rs2;
+}
+)
diff --git a/riscv/insns/pmacc_w_h00.h b/riscv/insns/pmacc_w_h00.h
new file mode 100644
index 00000000..086e8907
--- /dev/null
+++ b/riscv/insns/pmacc_w_h00.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_EE_LOOP(32, 16, 16, {
+  p_rd += sext32(p_rs1) * sext32(p_rs2);
+}
+)
diff --git a/riscv/insns/pmacc_w_h01.h b/riscv/insns/pmacc_w_h01.h
new file mode 100644
index 00000000..67557cf4
--- /dev/null
+++ b/riscv/insns/pmacc_w_h01.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_EO_LOOP(32, 16, 16, {
+  p_rd += sext32(p_rs1) * sext32(p_rs2);
+}
+)
diff --git a/riscv/insns/pmacc_w_h11.h b/riscv/insns/pmacc_w_h11.h
new file mode 100644
index 00000000..bd45540f
--- /dev/null
+++ b/riscv/insns/pmacc_w_h11.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_OO_LOOP(32, 16, 16, {
+  p_rd += sext32(p_rs1) * sext32(p_rs2);
+}
+)
diff --git a/riscv/insns/pmaccsu_w_h00.h b/riscv/insns/pmaccsu_w_h00.h
new file mode 100644
index 00000000..d1c3cd54
--- /dev/null
+++ b/riscv/insns/pmaccsu_w_h00.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_EE_SULOOP(32, 16, 16, {
+  p_rd += sext32(p_rs1) * zext32(p_rs2);
+}
+)
diff --git a/riscv/insns/pmaccsu_w_h11.h b/riscv/insns/pmaccsu_w_h11.h
new file mode 100644
index 00000000..dbe0b7fa
--- /dev/null
+++ b/riscv/insns/pmaccsu_w_h11.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_OO_SULOOP(32, 16, 16, {
+  p_rd += sext32(p_rs1) * zext32(p_rs2);
+}
+)
diff --git a/riscv/insns/pmaccu_w_h00.h b/riscv/insns/pmaccu_w_h00.h
new file mode 100644
index 00000000..001f7f42
--- /dev/null
+++ b/riscv/insns/pmaccu_w_h00.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_EE_ULOOP(32, 16, 16, {
+  p_rd += zext32(p_rs1) * zext32(p_rs2);
+}
+)
diff --git a/riscv/insns/pmaccu_w_h01.h b/riscv/insns/pmaccu_w_h01.h
new file mode 100644
index 00000000..da2a195c
--- /dev/null
+++ b/riscv/insns/pmaccu_w_h01.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_EO_ULOOP(32, 16, 16, {
+  p_rd += zext32(p_rs1) * zext32(p_rs2);
+}
+)
diff --git a/riscv/insns/pmaccu_w_h11.h b/riscv/insns/pmaccu_w_h11.h
new file mode 100644
index 00000000..9aa94bd0
--- /dev/null
+++ b/riscv/insns/pmaccu_w_h11.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_OO_ULOOP(32, 16, 16, {
+  p_rd += zext32(p_rs1) * zext32(p_rs2);
+}
+)
diff --git a/riscv/insns/pmhacc_w.h b/riscv/insns/pmhacc_w.h
new file mode 100644
index 00000000..49f01c3f
--- /dev/null
+++ b/riscv/insns/pmhacc_w.h
@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_LOOP(32,32,32, {
+  sreg_t mres = sext(p_rs1,64) * sext(p_rs2,64);
+  p_rd += mres>>32; 
+}
+)
diff --git a/riscv/insns/pmhacc_w_h0.h b/riscv/insns/pmhacc_w_h0.h
new file mode 100644
index 00000000..76b33778
--- /dev/null
+++ b/riscv/insns/pmhacc_w_h0.h
@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_E_LOOP(32,32,16, {
+  sreg_t mres = sext(p_rs1,64) * sext(p_rs2,64);
+  p_rd += mres>>32; 
+}
+)
diff --git a/riscv/insns/pmhacc_w_h1.h b/riscv/insns/pmhacc_w_h1.h
new file mode 100644
index 00000000..9f103ad6
--- /dev/null
+++ b/riscv/insns/pmhacc_w_h1.h
@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_O_LOOP(32,32,16, {
+  sreg_t mres = sext(p_rs1,64) * sext(p_rs2,64);
+  p_rd += mres>>32; 
+}
+)
diff --git a/riscv/insns/pmhaccsu_w.h b/riscv/insns/pmhaccsu_w.h
new file mode 100644
index 00000000..f82a283e
--- /dev/null
+++ b/riscv/insns/pmhaccsu_w.h
@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_SULOOP(32,32,32, {
+  sreg_t mres = sext(p_rs1,64) * zext(p_rs2,64);
+  p_rd += mres>>32;
+}
+)
diff --git a/riscv/insns/pmhaccsu_w_h0.h b/riscv/insns/pmhaccsu_w_h0.h
new file mode 100644
index 00000000..400eaa92
--- /dev/null
+++ b/riscv/insns/pmhaccsu_w_h0.h
@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_E_SULOOP(32,32,16, {
+  sreg_t mres = sext(p_rs1,64) * zext(p_rs2,64);
+  p_rd += mres>>32;
+}
+)
diff --git a/riscv/insns/pmhaccsu_w_h1.h b/riscv/insns/pmhaccsu_w_h1.h
new file mode 100644
index 00000000..55b07f20
--- /dev/null
+++ b/riscv/insns/pmhaccsu_w_h1.h
@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_O_SULOOP(32,32,16, {
+  sreg_t mres = sext(p_rs1,64) * zext(p_rs2,64);
+  p_rd += mres>>32;
+}
+)
diff --git a/riscv/insns/pmhaccu_w.h b/riscv/insns/pmhaccu_w.h
new file mode 100644
index 00000000..4e8950ac
--- /dev/null
+++ b/riscv/insns/pmhaccu_w.h
@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_ULOOP(32,32,32, {
+  reg_t mres = zext(p_rs1,64) * zext(p_rs2,64);
+  p_rd += mres>>32;
+}
+)
diff --git a/riscv/insns/pmhracc_w.h b/riscv/insns/pmhracc_w.h
new file mode 100644
index 00000000..1a07d5a4
--- /dev/null
+++ b/riscv/insns/pmhracc_w.h
@@ -0,0 +1,7 @@
+require_rv64;
+P_RD_RS1_RS2_LOOP(32,32,32, {
+  sreg_t mres = sext(p_rs1,64) * sext(p_rs2,64);
+  int32_t round = ((mres >> 31) + 1) >> 1;
+  p_rd += round;
+}
+)
diff --git a/riscv/insns/pmhraccsu_w.h b/riscv/insns/pmhraccsu_w.h
new file mode 100644
index 00000000..7f1d648d
--- /dev/null
+++ b/riscv/insns/pmhraccsu_w.h
@@ -0,0 +1,7 @@
+require_rv64;
+P_RD_RS1_RS2_SULOOP(32,32,32, {
+  sreg_t mres = sext(p_rs1,64) * zext(p_rs2,64);
+  int32_t round = ((mres >> 31) + 1) >> 1;
+  p_rd += round;
+}
+)
diff --git a/riscv/insns/pmhraccu_w.h b/riscv/insns/pmhraccu_w.h
new file mode 100644
index 00000000..d25a0786
--- /dev/null
+++ b/riscv/insns/pmhraccu_w.h
@@ -0,0 +1,7 @@
+require_rv64;
+P_RD_RS1_RS2_ULOOP(32,32,32, {
+  reg_t mres = zext(p_rs1,64) * zext(p_rs2,64);
+  uint32_t round = ((mres >> 31) + 1) >> 1;
+  p_rd += round;
+}
+)
diff --git a/riscv/insns/pmq2add_w.h b/riscv/insns/pmq2add_w.h
new file mode 100644
index 00000000..261dd846
--- /dev/null
+++ b/riscv/insns/pmq2add_w.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_REDUCTION_LOOP(64, 32, false, false, {
+  p_res += ((sreg_t)p_rs1 * p_rs2) >> 31;
+}
+)
diff --git a/riscv/insns/pmq2adda_w.h b/riscv/insns/pmq2adda_w.h
new file mode 100644
index 00000000..5523d3f6
--- /dev/null
+++ b/riscv/insns/pmq2adda_w.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_REDUCTION_LOOP(64, 32, true, false, {
+  p_res += ((sreg_t)p_rs1 * p_rs2) >> 31;
+}
+)
diff --git a/riscv/insns/pmqacc_w_h00.h b/riscv/insns/pmqacc_w_h00.h
new file mode 100644
index 00000000..467eeedb
--- /dev/null
+++ b/riscv/insns/pmqacc_w_h00.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_EE_LOOP(32, 16, 16, {
+  p_rd += (p_rs1 * p_rs2) >> 15;
+})
+
diff --git a/riscv/insns/pmqacc_w_h01.h b/riscv/insns/pmqacc_w_h01.h
new file mode 100644
index 00000000..52e5fae0
--- /dev/null
+++ b/riscv/insns/pmqacc_w_h01.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_EO_LOOP(32, 16, 16, {
+  p_rd += (p_rs1 * p_rs2) >> 15;
+})
+
diff --git a/riscv/insns/pmqacc_w_h11.h b/riscv/insns/pmqacc_w_h11.h
new file mode 100644
index 00000000..a377e1af
--- /dev/null
+++ b/riscv/insns/pmqacc_w_h11.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_OO_LOOP(32, 16, 16, {
+  p_rd += (p_rs1 * p_rs2) >> 15;
+})
+
diff --git a/riscv/insns/pmqr2add_w.h b/riscv/insns/pmqr2add_w.h
new file mode 100644
index 00000000..ab46915b
--- /dev/null
+++ b/riscv/insns/pmqr2add_w.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_REDUCTION_LOOP(64, 32, false, false, {
+  p_res += (((sreg_t)p_rs1 * p_rs2) + 0x40000000) >> 31;
+}
+)
diff --git a/riscv/insns/pmqr2adda_w.h b/riscv/insns/pmqr2adda_w.h
new file mode 100644
index 00000000..36dce27e
--- /dev/null
+++ b/riscv/insns/pmqr2adda_w.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_REDUCTION_LOOP(64, 32, true, false, {
+  p_res += (((sreg_t)p_rs1 * p_rs2) + 0x40000000) >> 31;
+}
+)
diff --git a/riscv/insns/pmqracc_w_h00.h b/riscv/insns/pmqracc_w_h00.h
new file mode 100644
index 00000000..45b86be2
--- /dev/null
+++ b/riscv/insns/pmqracc_w_h00.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_EE_LOOP(32, 16, 16, {
+  p_rd += (p_rs1 * p_rs2 + 0x4000) >> 15;
+}
+)
diff --git a/riscv/insns/pmqracc_w_h01.h b/riscv/insns/pmqracc_w_h01.h
new file mode 100644
index 00000000..3dd8a325
--- /dev/null
+++ b/riscv/insns/pmqracc_w_h01.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_EO_LOOP(32, 16, 16, {
+  p_rd += (p_rs1 * p_rs2 + 0x4000) >> 15;
+}
+)
diff --git a/riscv/insns/pmqracc_w_h11.h b/riscv/insns/pmqracc_w_h11.h
new file mode 100644
index 00000000..a4250093
--- /dev/null
+++ b/riscv/insns/pmqracc_w_h11.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_OO_LOOP(32, 16, 16, {
+  p_rd += (p_rs1 * p_rs2 + 0x4000) >> 15;
+}
+)
diff --git a/riscv/insns/pmul_w_h00.h b/riscv/insns/pmul_w_h00.h
new file mode 100644
index 00000000..3181609f
--- /dev/null
+++ b/riscv/insns/pmul_w_h00.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_EE_LOOP(32, 16, 16, {
+  p_rd = sext32(p_rs1) * sext32(p_rs2);
+}
+)
diff --git a/riscv/insns/pmul_w_h01.h b/riscv/insns/pmul_w_h01.h
new file mode 100644
index 00000000..c7468696
--- /dev/null
+++ b/riscv/insns/pmul_w_h01.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_EO_LOOP(32, 16, 16, {
+  p_rd = sext32(p_rs1) * sext32(p_rs2);
+}
+)
diff --git a/riscv/insns/pmul_w_h11.h b/riscv/insns/pmul_w_h11.h
new file mode 100644
index 00000000..4a719d04
--- /dev/null
+++ b/riscv/insns/pmul_w_h11.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_OO_LOOP(32, 16, 16, {
+  p_rd = sext32(p_rs1) * sext32(p_rs2);
+}
+)
diff --git a/riscv/insns/pmulh_w.h b/riscv/insns/pmulh_w.h
new file mode 100644
index 00000000..9e13219f
--- /dev/null
+++ b/riscv/insns/pmulh_w.h
@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_LOOP(32,32,32, {
+  int64_t mres = sext(p_rs1,64) * sext(p_rs2,64);
+  p_rd = mres >> 32;
+}
+)
diff --git a/riscv/insns/pmulh_w_h0.h b/riscv/insns/pmulh_w_h0.h
new file mode 100644
index 00000000..bff17442
--- /dev/null
+++ b/riscv/insns/pmulh_w_h0.h
@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_E_LOOP(32,32,16, {
+  sreg_t mres = sext(p_rs1,64) * sext(p_rs2,64);
+  p_rd = mres >> 32;
+}
+)
diff --git a/riscv/insns/pmulh_w_h1.h b/riscv/insns/pmulh_w_h1.h
new file mode 100644
index 00000000..3a62a4aa
--- /dev/null
+++ b/riscv/insns/pmulh_w_h1.h
@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_O_LOOP(32,32,16, {
+  sreg_t mres = sext(p_rs1,64) * sext(p_rs2,64);
+  p_rd = mres >> 32;
+}
+)
diff --git a/riscv/insns/pmulhr_w.h b/riscv/insns/pmulhr_w.h
new file mode 100644
index 00000000..24c32972
--- /dev/null
+++ b/riscv/insns/pmulhr_w.h
@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_LOOP(32,32,32, {
+  sreg_t mres = sext(p_rs1,64) * sext(p_rs2,64);
+  p_rd = ((mres >> 31) + 1) >> 1;
+}
+)
diff --git a/riscv/insns/pmulhrsu_w.h b/riscv/insns/pmulhrsu_w.h
new file mode 100644
index 00000000..2e163636
--- /dev/null
+++ b/riscv/insns/pmulhrsu_w.h
@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_SULOOP(32,32,32, {
+  sreg_t mres = sext(p_rs1,64) * zext(p_rs2,64);
+  p_rd = ((mres >> 31) + 1) >> 1;
+}
+)
diff --git a/riscv/insns/pmulhru_w.h b/riscv/insns/pmulhru_w.h
new file mode 100644
index 00000000..b067d3f1
--- /dev/null
+++ b/riscv/insns/pmulhru_w.h
@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_ULOOP(32,32,32, {
+  reg_t mres = zext(p_rs1,64) * zext(p_rs2,64);
+  p_rd = ((mres >> 31) + 1) >> 1;
+}
+)
diff --git a/riscv/insns/pmulhsu_w.h b/riscv/insns/pmulhsu_w.h
new file mode 100644
index 00000000..7dbca256
--- /dev/null
+++ b/riscv/insns/pmulhsu_w.h
@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_SULOOP(32,32,32, {
+  int64_t mres = sext(p_rs1,64) * zext(p_rs2,64);
+  p_rd = mres >> 32;
+}
+)
diff --git a/riscv/insns/pmulhsu_w_h0.h b/riscv/insns/pmulhsu_w_h0.h
new file mode 100644
index 00000000..c4a28c74
--- /dev/null
+++ b/riscv/insns/pmulhsu_w_h0.h
@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_E_SULOOP(32,32,16, {
+  sreg_t mres = sext(p_rs1,64) * zext(p_rs2,64);
+  p_rd = mres >> 32;
+}
+)
diff --git a/riscv/insns/pmulhsu_w_h1.h b/riscv/insns/pmulhsu_w_h1.h
new file mode 100644
index 00000000..fd5f2345
--- /dev/null
+++ b/riscv/insns/pmulhsu_w_h1.h
@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_O_SULOOP(32,32,16, {
+  sreg_t mres = sext(p_rs1,64) * zext(p_rs2,64);
+  p_rd = mres >> 32;
+}
+)
diff --git a/riscv/insns/pmulhu_w.h b/riscv/insns/pmulhu_w.h
new file mode 100644
index 00000000..a24e264e
--- /dev/null
+++ b/riscv/insns/pmulhu_w.h
@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_ULOOP(32,32,32, {
+  uint64_t mres = zext(p_rs1,64) * zext(p_rs2,64);
+  p_rd = mres >> 32;
+}
+)
diff --git a/riscv/insns/pmulq_w.h b/riscv/insns/pmulq_w.h
new file mode 100644
index 00000000..62be5124
--- /dev/null
+++ b/riscv/insns/pmulq_w.h
@@ -0,0 +1,9 @@
+require_rv64;
+P_RD_RS1_RS2_LOOP(32,32,32, {
+  if ((p_rs1 != INT32_MIN) | (p_rs2 != INT32_MIN)) {
+    p_rd = ((int64_t)p_rs1 * (int64_t)p_rs2) >> 31;
+  } else {
+    p_rd = INT32_MAX;
+  }
+}
+)
diff --git a/riscv/insns/pmulqr_w.h b/riscv/insns/pmulqr_w.h
new file mode 100644
index 00000000..bbbc9a22
--- /dev/null
+++ b/riscv/insns/pmulqr_w.h
@@ -0,0 +1,9 @@
+require_rv64;
+P_RD_RS1_RS2_LOOP(32,32,32, {
+  if ((p_rs1 != INT32_MIN) | (p_rs2 != INT32_MIN)) {
+    p_rd = ((((int64_t)p_rs1 * (int64_t)p_rs2) >> 30) + 1) >> 1;
+  } else {
+    p_rd = INT32_MAX;
+  }
+}
+)
diff --git a/riscv/insns/pmulsu_w_h00.h b/riscv/insns/pmulsu_w_h00.h
new file mode 100644
index 00000000..2bb05fbd
--- /dev/null
+++ b/riscv/insns/pmulsu_w_h00.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_EE_SULOOP(32, 16, 16, {
+  p_rd = sext32(p_rs1) * zext32(p_rs2);
+}
+)
diff --git a/riscv/insns/pmulsu_w_h11.h b/riscv/insns/pmulsu_w_h11.h
new file mode 100644
index 00000000..ed08d452
--- /dev/null
+++ b/riscv/insns/pmulsu_w_h11.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_OO_SULOOP(32, 16, 16, {
+  p_rd = sext32(p_rs1) * zext32(p_rs2);
+}
+)
diff --git a/riscv/insns/pmulu_w_h00.h b/riscv/insns/pmulu_w_h00.h
new file mode 100644
index 00000000..441e46d6
--- /dev/null
+++ b/riscv/insns/pmulu_w_h00.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_EE_ULOOP(32, 16, 16, {
+  p_rd = zext32(p_rs1) * zext32(p_rs2);
+}
+)
diff --git a/riscv/insns/pmulu_w_h01.h b/riscv/insns/pmulu_w_h01.h
new file mode 100644
index 00000000..36c83c97
--- /dev/null
+++ b/riscv/insns/pmulu_w_h01.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_EO_ULOOP(32, 16, 16, {
+  p_rd = zext32(p_rs1) * zext32(p_rs2);
+}
+)
diff --git a/riscv/insns/pmulu_w_h11.h b/riscv/insns/pmulu_w_h11.h
new file mode 100644
index 00000000..05957239
--- /dev/null
+++ b/riscv/insns/pmulu_w_h11.h
@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_OO_ULOOP(32, 16, 16, {
+  p_rd = zext32(p_rs1) * zext32(p_rs2);
+}
+)
diff --git a/riscv/insns/sati.h b/riscv/insns/sati.h
new file mode 100644
index 00000000..bf8c4702
--- /dev/null
+++ b/riscv/insns/sati.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(P_SAT(insn.shamtd() + 1, (sreg_t)RS1));
diff --git a/riscv/insns/srari.h b/riscv/insns/srari.h
new file mode 100644
index 00000000..02fe3a23
--- /dev/null
+++ b/riscv/insns/srari.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(insn.shamtd() ? ((sext_xlen(RS1) >> insn.shamtd()) + ((sext_xlen(RS1) >> (insn.shamtd() - 1)) & 1)) : RS1);
diff --git a/riscv/insns/unzip16hp.h b/riscv/insns/unzip16hp.h
new file mode 100644
index 00000000..15e2088d
--- /dev/null
+++ b/riscv/insns/unzip16hp.h
@@ -0,0 +1 @@
+P_UNZIP(16, 1)
diff --git a/riscv/insns/unzip16p.h b/riscv/insns/unzip16p.h
new file mode 100644
index 00000000..6a3b7a06
--- /dev/null
+++ b/riscv/insns/unzip16p.h
@@ -0,0 +1 @@
+P_UNZIP(16, 0)
diff --git a/riscv/insns/unzip8hp.h b/riscv/insns/unzip8hp.h
new file mode 100644
index 00000000..365e9831
--- /dev/null
+++ b/riscv/insns/unzip8hp.h
@@ -0,0 +1 @@
+P_UNZIP(8, 1)
diff --git a/riscv/insns/unzip8p.h b/riscv/insns/unzip8p.h
new file mode 100644
index 00000000..d9b52d52
--- /dev/null
+++ b/riscv/insns/unzip8p.h
@@ -0,0 +1 @@
+P_UNZIP(8, 0)
diff --git a/riscv/insns/usati.h b/riscv/insns/usati.h
new file mode 100644
index 00000000..f08e9df7
--- /dev/null
+++ b/riscv/insns/usati.h
@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv64;
+WRITE_RD(P_USAT(insn.shamtd() + 1, (sreg_t)RS1));
diff --git a/riscv/insns/zip16hp.h b/riscv/insns/zip16hp.h
new file mode 100644
index 00000000..4090fc5c
--- /dev/null
+++ b/riscv/insns/zip16hp.h
@@ -0,0 +1,6 @@
+require_extension('P');
+require_rv64;
+P_RD_RS1_RS2_ZIP_LOOP(16, 16, 16, 1, {
+    p_rd = i % 2 ? p_rs2 : p_rs1;
+}
+)
diff --git a/riscv/insns/zip16p.h b/riscv/insns/zip16p.h
new file mode 100644
index 00000000..0bb2e9c7
--- /dev/null
+++ b/riscv/insns/zip16p.h
@@ -0,0 +1,6 @@
+require_extension('P');
+require_rv64;
+P_RD_RS1_RS2_ZIP_LOOP(16, 16, 16, 0, {
+    p_rd = i % 2 ? p_rs2 : p_rs1;
+}
+)
diff --git a/riscv/insns/zip8hp.h b/riscv/insns/zip8hp.h
new file mode 100644
index 00000000..9d323ef7
--- /dev/null
+++ b/riscv/insns/zip8hp.h
@@ -0,0 +1,5 @@
+require_extension('P');
+P_RD_RS1_RS2_ZIP_LOOP(8, 8, 8, 1, {
+    p_rd = i % 2 ? p_rs2 : p_rs1;
+}
+)
diff --git a/riscv/insns/zip8p.h b/riscv/insns/zip8p.h
new file mode 100644
index 00000000..7f00c7a7
--- /dev/null
+++ b/riscv/insns/zip8p.h
@@ -0,0 +1,5 @@
+require_extension('P');
+P_RD_RS1_RS2_ZIP_LOOP(8, 8, 8, 0, {
+    p_rd = i % 2 ? p_rs2 : p_rs1;
+}
+)
diff --git a/riscv/overlap_list.h b/riscv/overlap_list.h
index 0e7f2335..21233d59 100644
--- a/riscv/overlap_list.h
+++ b/riscv/overlap_list.h
@@ -52,3 +52,44 @@ DECLARE_OVERLAP_INSN(psslai_w, 'P')
 DECLARE_OVERLAP_INSN(pmseq_w, 'P')
 DECLARE_OVERLAP_INSN(pmslt_w, 'P')
 DECLARE_OVERLAP_INSN(pmsltu_w, 'P')
+DECLARE_OVERLAP_INSN(pmul_w_h00, 'P')
+DECLARE_OVERLAP_INSN(pmul_w_h01, 'P')
+DECLARE_OVERLAP_INSN(pmul_w_h11, 'P')
+DECLARE_OVERLAP_INSN(pmulh_w_h0, 'P')
+DECLARE_OVERLAP_INSN(pmulh_w_h1, 'P')
+DECLARE_OVERLAP_INSN(pmulhr_w, 'P')
+DECLARE_OVERLAP_INSN(pmulhrsu_w, 'P')
+DECLARE_OVERLAP_INSN(pmulhru_w, 'P')
+DECLARE_OVERLAP_INSN(pmulhsu_w_h0, 'P')
+DECLARE_OVERLAP_INSN(pmulhsu_w_h1, 'P')
+DECLARE_OVERLAP_INSN(pmulq_w, 'P')
+DECLARE_OVERLAP_INSN(pmulqr_w, 'P')
+DECLARE_OVERLAP_INSN(pmulsu_w_h00, 'P')
+DECLARE_OVERLAP_INSN(pmulsu_w_h11, 'P')
+DECLARE_OVERLAP_INSN(pmulu_w_h00, 'P')
+DECLARE_OVERLAP_INSN(pmulu_w_h01, 'P')
+DECLARE_OVERLAP_INSN(pmulu_w_h11, 'P')
+DECLARE_OVERLAP_INSN(pmacc_w_h00, 'P')
+DECLARE_OVERLAP_INSN(pmacc_w_h01, 'P')
+DECLARE_OVERLAP_INSN(pmacc_w_h11, 'P')
+DECLARE_OVERLAP_INSN(pmaccsu_w_h00, 'P')
+DECLARE_OVERLAP_INSN(pmaccsu_w_h11, 'P')
+DECLARE_OVERLAP_INSN(pmaccu_w_h00, 'P')
+DECLARE_OVERLAP_INSN(pmaccu_w_h01, 'P')
+DECLARE_OVERLAP_INSN(pmaccu_w_h11, 'P')
+DECLARE_OVERLAP_INSN(pmhacc_w, 'P')
+DECLARE_OVERLAP_INSN(pmhacc_w_h0, 'P')
+DECLARE_OVERLAP_INSN(pmhacc_w_h1, 'P')
+DECLARE_OVERLAP_INSN(pmhaccsu_w, 'P')
+DECLARE_OVERLAP_INSN(pmhaccsu_w_h0, 'P')
+DECLARE_OVERLAP_INSN(pmhaccsu_w_h1, 'P')
+DECLARE_OVERLAP_INSN(pmhaccu_w, 'P')
+DECLARE_OVERLAP_INSN(pmhracc_w, 'P')
+DECLARE_OVERLAP_INSN(pmhraccsu_w, 'P')
+DECLARE_OVERLAP_INSN(pmhraccu_w, 'P')
+DECLARE_OVERLAP_INSN(pmqacc_w_h00, 'P')
+DECLARE_OVERLAP_INSN(pmqacc_w_h01, 'P')
+DECLARE_OVERLAP_INSN(pmqacc_w_h11, 'P')
+DECLARE_OVERLAP_INSN(pmqracc_w_h00, 'P')
+DECLARE_OVERLAP_INSN(pmqracc_w_h01, 'P')
+DECLARE_OVERLAP_INSN(pmqracc_w_h11, 'P')
diff --git a/riscv/p_ext_macros.h b/riscv/p_ext_macros.h
index b867a375..c0498246 100644
--- a/riscv/p_ext_macros.h
+++ b/riscv/p_ext_macros.h
@@ -43,6 +43,9 @@
 #define P_RS1_ODD_UPARAMS(BIT) \
   auto p_rs1 = P_UFIELD(rs1, i * 2 + 1, BIT);
 
+#define P_RS1_ZIP_PARAMS(BIT) \
+  auto p_rs1 = P_UFIELD(rs1, i / 2 + pos, BIT);
+
 #define P_RS2_PARAMS(BIT) \
   auto p_rs2 = P_FIELD(rs2, i, BIT);  
 
@@ -76,6 +79,9 @@
 #define P_RS2_ODD_UPARAMS(BIT) \
   auto p_rs2 = P_UFIELD(rs2, i * 2 + 1, BIT);
 
+#define P_RS2_ZIP_PARAMS(BIT) \
+  auto p_rs2 = P_UFIELD(rs2, i / 2 + pos, BIT);
+
 // Loop base
 #define P_RD_LOOP_BASE(BIT) \
   require_extension('P'); \
@@ -229,6 +235,17 @@
   sreg_t len = xlen / (BIT); \
   for (sreg_t i = len - 1; i >= 0; --i) {
 
+#define P_RD_RS1_RS2_ZIP_LOOP_BASE(BIT, POS) \
+  require_rv64; \
+  require_extension('P'); \
+  require((BIT) == e8 || (BIT) == e16 || (BIT) == e32); \
+  reg_t rd_tmp = RD; \
+  reg_t rs1 = RS1; \
+  reg_t rs2 = RS2; \
+  sreg_t len = xlen / (BIT); \
+  sreg_t pos = POS * len / 2; \
+  for (sreg_t i = len - 1; i >= 0; --i) {
+
 // Loop body
 #define P_RD_LOOP_BODY(BIT, BODY) { \
   P_RD_PARAMS(BIT) \
@@ -404,6 +421,14 @@
   WRITE_P_RD(); \
 }
 
+#define P_RD_RS1_RS2_ZIP_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) { \
+  P_RD_PARAMS(BIT_RD) \
+  P_RS1_ZIP_PARAMS(BIT_RS1) \
+  P_RS2_ZIP_PARAMS(BIT_RS2) \
+  BODY \
+  WRITE_P_RD(); \
+}
+
 // Loop end
 #define P_RD_LOOP_END() \
   } \
@@ -492,6 +517,24 @@
   } \
   P_RD_LOOP_END()
 
+#define P_RD_RS1_RS2_ZIP_LOOP(BIT_RD, BIT_RS1, BIT_RS2, POS, BODY) \
+  P_RD_RS1_RS2_ZIP_LOOP_BASE(BIT_RD, POS) \
+  P_RD_RS1_RS2_ZIP_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \
+  P_RD_LOOP_END()
+
+#define P_UNZIP(BIT, HIGH) \
+  require_rv64; \
+  require_extension('P'); \
+  require(BIT == e8 || BIT == e16); \
+  reg_t rd_tmp = 0; \
+  for (sreg_t i = 0; i < xlen / BIT / 2; i++) { \
+    rd_tmp = set_field(rd_tmp, make_mask64(i * BIT, BIT), \
+      P_UFIELD(RS1, i * 2 + HIGH, BIT)); \
+    rd_tmp = set_field(rd_tmp, make_mask64(i * BIT + xlen / 2, BIT), \
+      P_UFIELD(RS2, i * 2 + HIGH, BIT)); \
+  } \
+  WRITE_RD(sext_xlen(rd_tmp));
+
 #define P_RD_RS1_RS2_EE_LOOP(BIT_RD, BIT_RS1, BIT_RS2, BODY) \
   P_RD_RS1_RS2_LOOP_BASE(BIT_RD) \
   P_RD_RS1_RS2_EE_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \
diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in
index 596f71d0..0338d24d 100644
--- a/riscv/riscv.mk.in
+++ b/riscv/riscv.mk.in
@@ -1207,8 +1207,10 @@ riscv_insn_ext_p = \
 	pabdsumau_b \
 	psext_h_b \
 	psati_h \
+	sati \
 	sati_rv32 \
 	pusati_h \
+	usati \
 	usati_rv32 \
 	pslli_b \
 	pslli_h \
@@ -1227,6 +1229,7 @@ riscv_insn_ext_p = \
 	pssha_hs \
 	psshar_hs \
 	sslai \
+	srari \
 	srari_rv32 \
 	ssha \
 	sshar \
@@ -1640,6 +1643,104 @@ riscv_insn_ext_p = \
 	rev \
 	rev16 \
 	rev_rv32 \
+	unzip16hp \
+	unzip16p \
+	unzip8hp \
+	unzip8p \
+	zip16hp \
+	zip16p \
+	zip8hp \
+	zip8p \
+	absw \
+	clsw \
+	mul_w00 \
+	mul_w01 \
+	mul_w11 \
+	mulsu_w00 \
+	mulsu_w11 \
+	mulu_w00 \
+	mulu_w01 \
+	mulu_w11 \
+	pmul_w_h00 \
+	pmul_w_h01 \
+	pmul_w_h11 \
+	pmulh_w \
+	pmulh_w_h0 \
+	pmulh_w_h1 \
+	pmulhr_w \
+	pmulhrsu_w \
+	pmulhru_w \
+	pmulhsu_w \
+	pmulhsu_w_h0 \
+	pmulhsu_w_h1 \
+	pmulhu_w \
+	pmulq_w \
+	pmulqr_w \
+	pmulsu_w_h00 \
+	pmulsu_w_h11 \
+	pmulu_w_h00 \
+	pmulu_w_h01 \
+	pmulu_w_h11 \
+	macc_w00 \
+	macc_w01 \
+	macc_w11 \
+	maccsu_w00 \
+	maccsu_w11 \
+	maccu_w00 \
+	maccu_w01 \
+	maccu_w11 \
+	mqacc_w00 \
+	mqacc_w01 \
+	mqacc_w11 \
+	mqracc_w00 \
+	mqracc_w01 \
+	mqracc_w11 \
+	pmacc_w_h00 \
+	pmacc_w_h01 \
+	pmacc_w_h11 \
+	pmaccsu_w_h00 \
+	pmaccsu_w_h11 \
+	pmaccu_w_h00 \
+	pmaccu_w_h01 \
+	pmaccu_w_h11 \
+	pmhacc_w \
+	pmhacc_w_h0 \
+	pmhacc_w_h1 \
+	pmhaccsu_w \
+	pmhaccsu_w_h0 \
+	pmhaccsu_w_h1 \
+	pmhaccu_w \
+	pmhracc_w \
+	pmhraccsu_w \
+	pmhraccu_w \
+	pmqacc_w_h00 \
+	pmqacc_w_h01 \
+	pmqacc_w_h11 \
+	pmqracc_w_h00 \
+	pmqracc_w_h01 \
+	pmqracc_w_h11 \
+	pm2add_w \
+	pm2add_wx \
+	pm2adda_w \
+	pm2adda_wx \
+	pm2addasu_w \
+	pm2addau_w \
+	pm2addsu_w \
+	pm2addu_w \
+	pm2sub_w \
+	pm2sub_wx \
+	pm2suba_w \
+	pm2suba_wx \
+	pm4add_h \
+	pm4adda_h \
+	pm4addasu_h \
+	pm4addau_h \
+	pm4addsu_h \
+	pm4addu_h \
+	pmq2add_w \
+	pmq2adda_w \
+	pmqr2add_w \
+	pmqr2adda_w \
 
 riscv_insn_list = \
 	$(riscv_insn_ext_i) \