Mask hideleg by mideleg

According to spec clarification:
https://github.com/riscv/riscv-isa-manual/pull/771

This has no functional effect today, because all the active bits of
hideleg are tied to 1 inside mideleg.

riscv/csrs.cc

@@ -956,6 +956,16 @@ void hypervisor_csr_t::verify_permissions(insn_t insn, bool write) const {
 }
 
 
+hideleg_csr_t::hideleg_csr_t(processor_t* const proc, const reg_t addr, csr_t_p mideleg):
+  masked_csr_t(proc, addr, MIP_VS_MASK, 0),
+  mideleg(mideleg) {
+}
+
+reg_t hideleg_csr_t::read() const noexcept {
+  return masked_csr_t::read() & mideleg->read();
+};
+
+
 hgatp_csr_t::hgatp_csr_t(processor_t* const proc, const reg_t addr):
   basic_csr_t(proc, addr, 0) {
 }

riscv/csrs.h

@@ -511,6 +511,15 @@ class hypervisor_csr_t: public basic_csr_t {
 };
 
 
+class hideleg_csr_t: public masked_csr_t {
+ public:
+  hideleg_csr_t(processor_t* const proc, const reg_t addr, csr_t_p mideleg);
+  virtual reg_t read() const noexcept override;
+ private:
+  csr_t_p mideleg;
+};
+
+
 class hgatp_csr_t: public basic_csr_t {
  public:
   hgatp_csr_t(processor_t* const proc, const reg_t addr);

riscv/processor.cc

@@ -474,7 +474,7 @@ void state_t::reset(processor_t* const proc, reg_t max_isa)
   csrmap[CSR_HSTATUS] = hstatus = std::make_shared<masked_csr_t>(proc, CSR_HSTATUS, hstatus_mask, hstatus_init);
   csrmap[CSR_HGEIE] = std::make_shared<const_csr_t>(proc, CSR_HGEIE, 0);
   csrmap[CSR_HGEIP] = std::make_shared<const_csr_t>(proc, CSR_HGEIP, 0);
-  csrmap[CSR_HIDELEG] = hideleg = std::make_shared<masked_csr_t>(proc, CSR_HIDELEG, MIP_VS_MASK, 0);
+  csrmap[CSR_HIDELEG] = hideleg = std::make_shared<hideleg_csr_t>(proc, CSR_HIDELEG, mideleg);
   const reg_t hedeleg_mask =
     (1 << CAUSE_MISALIGNED_FETCH) |
     (1 << CAUSE_FETCH_ACCESS) |