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@ -164,14 +164,23 @@ public: |
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template<class T, unsigned xlate_flags> |
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inline void store_fast(reg_t addr, T val, bool actually_store=true, bool require_alignment=false) { |
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const size_t size = sizeof(T); |
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if (unlikely(addr & (size-1))) { |
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if (require_alignment) |
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store_conditional_address_misaligned(addr); |
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else |
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return misaligned_store(addr, val, size, xlate_flags, actually_store); |
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const reg_t vpn = addr >> PGSHIFT; |
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if (xlate_flags == 0 && |
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unlikely(tlb_store_tag[vpn % TLB_ENTRIES] == (vpn | TLB_CHECK_TRIGGERS)) && |
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actually_store) { |
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if (!matched_trigger) { |
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matched_trigger = trigger_exception(triggers::OPERATION_STORE, addr, val); |
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if (matched_trigger) |
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throw *matched_trigger; |
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} |
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} |
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reg_t vpn = addr >> PGSHIFT; |
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if (xlate_flags == 0 && likely(tlb_store_tag[vpn % TLB_ENTRIES] == vpn)) { |
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if (unlikely(addr & (size-1))) { |
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if (require_alignment) |
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store_conditional_address_misaligned(addr); |
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else |
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return misaligned_store(addr, val, size, xlate_flags, actually_store); |
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} |
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if (actually_store) { |
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if (proc) |
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WRITE_MEM(addr, val, size); |
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@ -179,12 +188,13 @@ public: |
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} |
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} |
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else if (xlate_flags == 0 && unlikely(tlb_store_tag[vpn % TLB_ENTRIES] == (vpn | TLB_CHECK_TRIGGERS))) { |
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if (unlikely(addr & (size-1))) { |
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if (require_alignment) |
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store_conditional_address_misaligned(addr); |
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else |
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return misaligned_store(addr, val, size, xlate_flags, actually_store); |
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} |
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if (actually_store) { |
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if (!matched_trigger) { |
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matched_trigger = trigger_exception(triggers::OPERATION_STORE, addr, val); |
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if (matched_trigger) |
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throw *matched_trigger; |
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} |
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if (proc) |
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WRITE_MEM(addr, val, size); |
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*(target_endian<T>*)(tlb_data[vpn % TLB_ENTRIES].host_offset + addr) = to_target(val); |
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@ -192,7 +202,8 @@ public: |
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} |
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else { |
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target_endian<T> target_val = to_target(val); |
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store_slow_path(addr, size, (const uint8_t*)&target_val, xlate_flags, actually_store); |
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store_slow_path(addr, size, (const uint8_t*)&target_val, xlate_flags, actually_store, |
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require_alignment); |
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if (actually_store && proc) |
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WRITE_MEM(addr, val, size); |
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} |
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@ -471,7 +482,8 @@ private: |
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// handle uncommon cases: TLB misses, page faults, MMIO
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tlb_entry_t fetch_slow_path(reg_t addr); |
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void load_slow_path(reg_t addr, reg_t len, uint8_t* bytes, uint32_t xlate_flags, bool require_alignment); |
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void store_slow_path(reg_t addr, reg_t len, const uint8_t* bytes, uint32_t xlate_flags, bool actually_store); |
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void store_slow_path(reg_t addr, reg_t len, const uint8_t* bytes, uint32_t xlate_flags, bool actually_store, |
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bool require_alignment); |
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bool mmio_load(reg_t addr, size_t len, uint8_t* bytes); |
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bool mmio_store(reg_t addr, size_t len, const uint8_t* bytes); |
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bool mmio_ok(reg_t addr, access_type type); |
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