From d0d923ebdef92deb26ac0f02fb15e61e328c602a Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 28 Nov 2020 14:49:03 +0530
Subject: [PATCH] Fix typo in HTVAL CSR write emulation

We are saving new HTVAL value in wrong location for HTVAL CSR write
so let's fix this.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 riscv/processor.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/riscv/processor.cc b/riscv/processor.cc
index e01e1962..9cfd4ad5 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -1142,7 +1142,7 @@ void processor_t::set_csr(int which, reg_t val)
       /* Ignore */
       break;
     case CSR_HTVAL:
-      state.htinst = val;
+      state.htval = val;
       break;
     case CSR_HIP: {
       reg_t mask = MIP_VSSIP;