Add stateen related check for float point instructions

riscv/csrs.cc

@@ -1201,7 +1201,7 @@ float_csr_t::float_csr_t(processor_t* const proc, const reg_t addr, const reg_t
 
 void float_csr_t::verify_permissions(insn_t insn, bool write) const {
   masked_csr_t::verify_permissions(insn, write);
-  require_fp;
+  require_fs;
   if (!proc->extension_enabled('F') && !proc->extension_enabled(EXT_ZFINX))
     throw trap_illegal_instruction(insn.bits());
 }

riscv/decode.h

@@ -292,7 +292,8 @@ do { \
 #define require_extension(s) require(p->extension_enabled(s))
 #define require_either_extension(A,B) require(p->extension_enabled(A) || p->extension_enabled(B));
 #define require_impl(s) require(p->supports_impl(s))
-#define require_fp          require(STATE.sstatus->enabled(SSTATUS_FS))
+#define require_fs          require(STATE.sstatus->enabled(SSTATUS_FS))
+#define require_fp          STATE.fflags->verify_permissions(insn, false)
 #define require_accelerator require(STATE.sstatus->enabled(SSTATUS_XS))
 #define require_vector_vs   require(STATE.sstatus->enabled(SSTATUS_VS))
 #define require_vector(alu) \