rvv: add reciprocal instructions

Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>

riscv/encoding.h

@@ -1306,6 +1306,10 @@
 #define MASK_VFNCVT_RTZ_X_F_W  0xfc0ff07f
 #define MATCH_VFSQRT_V 0x4c001057
 #define MASK_VFSQRT_V  0xfc0ff07f
+#define MATCH_VFRSQRTE7_V 0x4c021057
+#define MASK_VFRSQRTE7_V  0xfc0ff07f
+#define MATCH_VFRECE7_V 0x4c029057
+#define MASK_VFRECE7_V  0xfc0ff07f
 #define MATCH_VFCLASS_V 0x4c081057
 #define MASK_VFCLASS_V  0xfc0ff07f
 #define MATCH_VFWADD_VV 0xc0001057
@@ -2648,6 +2652,8 @@ DECLARE_INSN(vfncvt_rod_f_f_w, MATCH_VFNCVT_ROD_F_F_W, MASK_VFNCVT_ROD_F_F_W)
 DECLARE_INSN(vfncvt_rtz_xu_f_w, MATCH_VFNCVT_RTZ_XU_F_W, MASK_VFNCVT_RTZ_XU_F_W)
 DECLARE_INSN(vfncvt_rtz_x_f_w, MATCH_VFNCVT_RTZ_X_F_W, MASK_VFNCVT_RTZ_X_F_W)
 DECLARE_INSN(vfsqrt_v, MATCH_VFSQRT_V, MASK_VFSQRT_V)
+DECLARE_INSN(vfrsqrte7_v, MATCH_VFRSQRTE7_V, MASK_VFRSQRTE7_V)
+DECLARE_INSN(vfrece7_v, MATCH_VFRECE7_V, MASK_VFRECE7_V)
 DECLARE_INSN(vfclass_v, MATCH_VFCLASS_V, MASK_VFCLASS_V)
 DECLARE_INSN(vfwadd_vv, MATCH_VFWADD_VV, MASK_VFWADD_VV)
 DECLARE_INSN(vfwredsum_vs, MATCH_VFWREDSUM_VS, MASK_VFWREDSUM_VS)

riscv/insns/vfrece7_v.h

@@ -0,0 +1,11 @@
+// vfclass.v vd, vs2, vm
+VI_VFP_V_LOOP
+({
+  vd = f16_recip7(vs2);
+},
+{
+  vd = f32_recip7(vs2);
+},
+{
+  vd = f64_recip7(vs2);
+})

riscv/insns/vfrsqrte7_v.h

@@ -0,0 +1,11 @@
+// vfclass.v vd, vs2, vm
+VI_VFP_V_LOOP
+({
+  vd = f16_rsqrte7(vs2);
+},
+{
+  vd = f32_rsqrte7(vs2);
+},
+{
+  vd = f64_rsqrte7(vs2);
+})

riscv/riscv.mk.in

@@ -598,7 +598,9 @@ riscv_insn_ext_v_alu_fp = \
 	vfredmin_vs \
 	vfredosum_vs \
 	vfredsum_vs \
+	vfrece7_v \
 	vfrsub_vf \
+	vfrsqrte7_v \
 	vfsgnj_vf \
 	vfsgnj_vv \
 	vfsgnjn_vf \

spike_main/disasm.cc

@@ -1136,6 +1136,8 @@ disassembler_t::disassembler_t(int xlen)
 
   //vfunary1
   DISASM_INSN("vfsqrt.v", vfsqrt_v, 0, {&vd, &vs2, &opt, &vm});
+  DISASM_INSN("vfrsqrte7.v", vfrsqrte7_v, 0, {&vd, &vs2, &opt, &vm});
+  DISASM_INSN("vfrece7.v", vfrece7_v, 0, {&vd, &vs2, &opt, &vm});
   DISASM_INSN("vfclass.v", vfclass_v, 0, {&vd, &vs2, &opt, &vm});
 
   DISASM_OPIV_VF_INSN(vfmul);