[xcc,sim] rv64 'w' instruction semantics changed

they no longer require their inputs to be canonicalized 32b values, so
this speeds up mixed int/long code sequences.

riscv/insns/srai.h

@@ -4,5 +4,5 @@ else
 {
   if(SHAMT & 0x20)
     throw trap_illegal_instruction;
-  RD = sext32(sreg_t(RS1) >> SHAMT);
+  RD = sext32(int32_t(RS1) >> SHAMT);
 }

riscv/insns/sraiw.h

@@ -1,2 +1,2 @@
 require_xpr64;
-RD = sext32(sreg_t(RS1) >> SHAMTW);
+RD = sext32(int32_t(RS1) >> SHAMTW);