Browse Source

Add cfg_t field to enable PTE dirtying

pull/1210/head
Jerry Zhao 3 years ago
parent
commit
c4e7c88728
  1. 1
      ci-tests/testlib.c
  2. 3
      riscv/cfg.h
  3. 1
      spike_main/spike-log-parser.cc
  4. 1
      spike_main/spike.cc

1
ci-tests/testlib.c

@ -23,6 +23,7 @@ int main()
"vlen:128,elen:64",
false,
endianness_little,
false,
16,
mem_cfg,
hartids,

3
riscv/cfg.h

@ -54,6 +54,7 @@ public:
const char *default_varch,
const bool default_misaligned,
const endianness_t default_endianness,
const bool default_dirty_enabled,
const reg_t default_pmpregions,
const std::vector<mem_cfg_t> &default_mem_layout,
const std::vector<int> default_hartids,
@ -65,6 +66,7 @@ public:
varch(default_varch),
misaligned(default_misaligned),
endianness(default_endianness),
dirty_enabled(default_dirty_enabled),
pmpregions(default_pmpregions),
mem_layout(default_mem_layout),
hartids(default_hartids),
@ -79,6 +81,7 @@ public:
cfg_arg_t<const char *> varch;
bool misaligned;
endianness_t endianness;
bool dirty_enabled;
reg_t pmpregions;
cfg_arg_t<std::vector<mem_cfg_t>> mem_layout;
std::optional<reg_t> start_pc;

1
spike_main/spike-log-parser.cc

@ -35,6 +35,7 @@ int main(int UNUSED argc, char** argv)
/*default_varch=*/DEFAULT_VARCH,
/*default_misaligned=*/false,
/*default_endianness*/endianness_little,
/*default_dirty_enabled=*/false,
/*default_pmpregions=*/16,
/*default_mem_layout=*/std::vector<mem_cfg_t>(),
/*default_hartids=*/std::vector<int>(),

1
spike_main/spike.cc

@ -330,6 +330,7 @@ int main(int argc, char** argv)
/*default_varch=*/DEFAULT_VARCH,
/*default_misaligned=*/false,
/*default_endianness*/endianness_little,
/*default_dirty_enabled*/false,
/*default_pmpregions=*/16,
/*default_mem_layout=*/parse_mem_layout("2048"),
/*default_hartids=*/std::vector<int>(),

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