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module_t::trigger_match -> memory_access_match

pull/944/head
Tim Newsome 4 years ago
parent
commit
bd7ca31454
  1. 4
      riscv/mmu.h
  2. 2
      riscv/triggers.cc
  3. 2
      riscv/triggers.h

4
riscv/mmu.h

@ -457,7 +457,7 @@ private:
}
if (unlikely(tlb_insn_tag[vpn % TLB_ENTRIES] == (vpn | TLB_CHECK_TRIGGERS))) {
target_endian<uint16_t>* ptr = (target_endian<uint16_t>*)(tlb_data[vpn % TLB_ENTRIES].host_offset + addr);
int match = proc->TM.trigger_match(triggers::OPERATION_EXECUTE, addr, from_target(*ptr));
int match = proc->TM.memory_access_match(triggers::OPERATION_EXECUTE, addr, from_target(*ptr));
if (match >= 0) {
throw triggers::matched_t(match, triggers::OPERATION_EXECUTE, addr, from_target(*ptr));
}
@ -475,7 +475,7 @@ private:
if (!proc) {
return NULL;
}
int match = proc->TM.trigger_match(operation, address, data);
int match = proc->TM.memory_access_match(operation, address, data);
if (match == -1)
return NULL;
if (proc->TM.triggers[match]->timing == 0) {

2
riscv/triggers.cc

@ -139,7 +139,7 @@ module_t::module_t(unsigned count) : triggers(count) {
}
// Return the index of a trigger that matched, or -1.
int module_t::trigger_match(triggers::operation_t operation, reg_t address, reg_t data)
int module_t::memory_access_match(triggers::operation_t operation, reg_t address, reg_t data)
{
state_t *state = proc->get_state();
if (state->debug_mode)

2
riscv/triggers.h

@ -91,7 +91,7 @@ public:
module_t(unsigned count);
// Return the index of a trigger that matched, or -1.
int trigger_match(triggers::operation_t operation, reg_t address, reg_t data);
int memory_access_match(triggers::operation_t operation, reg_t address, reg_t data);
processor_t *proc;
std::vector<mcontrol_t *> triggers;

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