From b5f68dc55c2b310d24db35a3c7df1ad86509ab61 Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Wed, 21 Dec 2022 00:34:20 -0800
Subject: [PATCH] Remove --enable-histogram option

It's now redundant.
---
 config.h.in        |  3 ---
 configure          | 14 --------------
 riscv/processor.cc |  7 -------
 riscv/riscv.ac     |  5 -----
 4 files changed, 29 deletions(-)

diff --git a/config.h.in b/config.h.in
index 461cb5d4..c89b10da 100644
--- a/config.h.in
+++ b/config.h.in
@@ -105,9 +105,6 @@
 /* Enable support for running target in either endianness */
 #undef RISCV_ENABLE_DUAL_ENDIAN
 
-/* Enable PC histogram generation */
-#undef RISCV_ENABLE_HISTOGRAM
-
 /* Enable hardware support for misaligned loads and stores */
 #undef RISCV_ENABLE_MISALIGNED
 
diff --git a/configure b/configure
index 2f51fa21..39371571 100755
--- a/configure
+++ b/configure
@@ -715,7 +715,6 @@ with_isa
 with_priv
 with_varch
 with_target
-enable_histogram
 enable_dirty
 enable_misaligned
 enable_dual_endian
@@ -1361,7 +1360,6 @@ Optional Features:
   --enable-stow           Enable stow-based install
   --enable-optional-subprojects
                           Enable all optional subprojects
-  --enable-histogram      Enable PC histogram generation
   --enable-dirty          Enable hardware management of PTE accessed and dirty
                           bits
   --enable-misaligned     Enable hardware support for misaligned loads and
@@ -6051,18 +6049,6 @@ else
   as_fn_error $? "libpthread is required" "$LINENO" 5
 fi
 
-# Check whether --enable-histogram was given.
-if test "${enable_histogram+set}" = set; then :
-  enableval=$enable_histogram;
-fi
-
-if test "x$enable_histogram" = "xyes"; then :
-
-
-$as_echo "#define RISCV_ENABLE_HISTOGRAM /**/" >>confdefs.h
-
-
-fi
 
 # Check whether --enable-dirty was given.
 if test "${enable_dirty+set}" = set; then :
diff --git a/riscv/processor.cc b/riscv/processor.cc
index 6e064081..2925478d 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -519,13 +519,6 @@ void processor_t::set_debug(bool value)
 void processor_t::set_histogram(bool value)
 {
   histogram_enabled = value;
-#ifndef RISCV_ENABLE_HISTOGRAM
-  if (value) {
-    fprintf(stderr, "PC Histogram support has not been properly enabled;");
-    fprintf(stderr, " please re-build the riscv-isa-sim project using \"configure --enable-histogram\".\n");
-    abort();
-  }
-#endif
 }
 
 void processor_t::enable_log_commits()
diff --git a/riscv/riscv.ac b/riscv/riscv.ac
index 5f623be9..70d84381 100644
--- a/riscv/riscv.ac
+++ b/riscv/riscv.ac
@@ -39,11 +39,6 @@ AC_SEARCH_LIBS([dlopen], [dl dld], [
 
 AC_CHECK_LIB(pthread, pthread_create, [], [AC_MSG_ERROR([libpthread is required])])
 
-AC_ARG_ENABLE([histogram], AS_HELP_STRING([--enable-histogram], [Enable PC histogram generation]))
-AS_IF([test "x$enable_histogram" = "xyes"], [
-  AC_DEFINE([RISCV_ENABLE_HISTOGRAM],,[Enable PC histogram generation])
-])
-
 AC_ARG_ENABLE([dirty], AS_HELP_STRING([--enable-dirty], [Enable hardware management of PTE accessed and dirty bits]))
 AS_IF([test "x$enable_dirty" = "xyes"], [
   AC_DEFINE([RISCV_ENABLE_DIRTY],,[Enable hardware management of PTE accessed and dirty bits])