From 007199efdce2b52650fac5822e2dd2351a0a16b9 Mon Sep 17 00:00:00 2001 From: YenHaoChen Date: Fri, 30 Dec 2022 11:22:20 +0800 Subject: [PATCH 01/15] triggers: refactor: add bool itrigger_t::simple_match() --- riscv/triggers.cc | 7 ++++++- riscv/triggers.h | 1 + 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/riscv/triggers.cc b/riscv/triggers.cc index 0ff36e8e..60e9ea25 100644 --- a/riscv/triggers.cc +++ b/riscv/triggers.cc @@ -319,13 +319,18 @@ std::optional itrigger_t::detect_trap_match(processor_t * const bool interrupt = (t.cause() & ((reg_t)1 << (xlen - 1))) != 0; reg_t bit = t.cause() & ~((reg_t)1 << (xlen - 1)); assert(bit < xlen); - if (interrupt && ((bit == 0 && nmi) || ((tdata2 >> bit) & 1))) { // Assume NMI's exception code is 0 + if (simple_match(interrupt, bit)) { hit = true; return match_result_t(TIMING_AFTER, action); } return std::nullopt; } +bool itrigger_t::simple_match(bool interrupt, reg_t bit) const +{ + return interrupt && ((bit == 0 && nmi) || ((tdata2 >> bit) & 1)); // Assume NMI's exception code is 0 +} + reg_t etrigger_t::tdata1_read(const processor_t * const proc) const noexcept { auto xlen = proc->get_xlen(); diff --git a/riscv/triggers.h b/riscv/triggers.h index 62d6db86..555ac136 100644 --- a/riscv/triggers.h +++ b/riscv/triggers.h @@ -156,6 +156,7 @@ public: virtual std::optional detect_trap_match(processor_t * const proc, const trap_t& t) noexcept override; private: + bool simple_match(bool interrupt, reg_t bit) const; bool dmode; bool hit; bool nmi; From 9f4a93dbf92b5a9e475b3f18335a40bb3f122030 Mon Sep 17 00:00:00 2001 From: YenHaoChen Date: Fri, 30 Dec 2022 11:28:19 +0800 Subject: [PATCH 02/15] triggers: refactor: add bool etrigger_t::simple_match() --- riscv/triggers.cc | 7 ++++++- riscv/triggers.h | 1 + 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/riscv/triggers.cc b/riscv/triggers.cc index 60e9ea25..07d14844 100644 --- a/riscv/triggers.cc +++ b/riscv/triggers.cc @@ -370,13 +370,18 @@ std::optional etrigger_t::detect_trap_match(processor_t * const bool interrupt = (t.cause() & ((reg_t)1 << (xlen - 1))) != 0; reg_t bit = t.cause() & ~((reg_t)1 << (xlen - 1)); assert(bit < xlen); - if (!interrupt && ((tdata2 >> bit) & 1)) { + if (simple_match(interrupt, bit)) { hit = true; return match_result_t(TIMING_AFTER, action); } return std::nullopt; } +bool etrigger_t::simple_match(bool interrupt, reg_t bit) const +{ + return !interrupt && ((tdata2 >> bit) & 1); +} + module_t::module_t(unsigned count) : triggers(count) { for (unsigned i = 0; i < count; i++) { triggers[i] = new disabled_trigger_t(); diff --git a/riscv/triggers.h b/riscv/triggers.h index 555ac136..f05466a2 100644 --- a/riscv/triggers.h +++ b/riscv/triggers.h @@ -174,6 +174,7 @@ public: virtual std::optional detect_trap_match(processor_t * const proc, const trap_t& t) noexcept override; private: + bool simple_match(bool interrupt, reg_t bit) const; bool dmode; bool hit; action_t action; From d9bc868d2ce6a940e75a0e7fbc3fe5b09a816c2c Mon Sep 17 00:00:00 2001 From: YenHaoChen Date: Wed, 4 Jan 2023 09:14:09 +0800 Subject: [PATCH 03/15] triggers: refactor: add empty parent trap_common_t class for itrigger_t and etrigger_t --- riscv/triggers.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/riscv/triggers.h b/riscv/triggers.h index f05466a2..4e4c156e 100644 --- a/riscv/triggers.h +++ b/riscv/triggers.h @@ -145,7 +145,10 @@ private: bool dmode; }; -class itrigger_t : public trigger_t { +class trap_common_t : public trigger_t { +}; + +class itrigger_t : public trap_common_t { public: virtual reg_t tdata1_read(const processor_t * const proc) const noexcept override; virtual void tdata1_write(processor_t * const proc, const reg_t val, const bool allow_chain) noexcept override; @@ -163,7 +166,7 @@ private: action_t action; }; -class etrigger_t : public trigger_t { +class etrigger_t : public trap_common_t { public: virtual reg_t tdata1_read(const processor_t * const proc) const noexcept override; virtual void tdata1_write(processor_t * const proc, const reg_t val, const bool allow_chain) noexcept override; From 1ffeac39c5b42424dc674de1ee4a3362a8aa50c4 Mon Sep 17 00:00:00 2001 From: YenHaoChen Date: Wed, 4 Jan 2023 09:19:24 +0800 Subject: [PATCH 04/15] triggers: refactor: move dmode variable to trap_common_t from itrigger_t/etrigger_t --- riscv/triggers.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/riscv/triggers.h b/riscv/triggers.h index 4e4c156e..9d1e943b 100644 --- a/riscv/triggers.h +++ b/riscv/triggers.h @@ -146,6 +146,8 @@ private: }; class trap_common_t : public trigger_t { +protected: + bool dmode; }; class itrigger_t : public trap_common_t { @@ -160,7 +162,6 @@ public: private: bool simple_match(bool interrupt, reg_t bit) const; - bool dmode; bool hit; bool nmi; action_t action; @@ -178,7 +179,6 @@ public: private: bool simple_match(bool interrupt, reg_t bit) const; - bool dmode; bool hit; action_t action; }; From 5fa820d323d1b53c7641fed52214b86f7272c58d Mon Sep 17 00:00:00 2001 From: YenHaoChen Date: Wed, 4 Jan 2023 09:20:49 +0800 Subject: [PATCH 05/15] triggers: refactor: move hit variable to trap_common_t from itrigger_t/etrigger_t --- riscv/triggers.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/riscv/triggers.h b/riscv/triggers.h index 9d1e943b..4a2b1588 100644 --- a/riscv/triggers.h +++ b/riscv/triggers.h @@ -148,6 +148,7 @@ private: class trap_common_t : public trigger_t { protected: bool dmode; + bool hit; }; class itrigger_t : public trap_common_t { @@ -162,7 +163,6 @@ public: private: bool simple_match(bool interrupt, reg_t bit) const; - bool hit; bool nmi; action_t action; }; @@ -179,7 +179,6 @@ public: private: bool simple_match(bool interrupt, reg_t bit) const; - bool hit; action_t action; }; From 1517591add456cd38b132c379237429ec63a6a4f Mon Sep 17 00:00:00 2001 From: YenHaoChen Date: Wed, 4 Jan 2023 09:22:04 +0800 Subject: [PATCH 06/15] triggers: refactor: move action variable to trap_common_t from itrigger_t/etrigger_t --- riscv/triggers.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/riscv/triggers.h b/riscv/triggers.h index 4a2b1588..7dc2419b 100644 --- a/riscv/triggers.h +++ b/riscv/triggers.h @@ -149,6 +149,7 @@ class trap_common_t : public trigger_t { protected: bool dmode; bool hit; + action_t action; }; class itrigger_t : public trap_common_t { @@ -164,7 +165,6 @@ public: private: bool simple_match(bool interrupt, reg_t bit) const; bool nmi; - action_t action; }; class etrigger_t : public trap_common_t { @@ -179,7 +179,6 @@ public: private: bool simple_match(bool interrupt, reg_t bit) const; - action_t action; }; class mcontrol_common_t : public trigger_t { From c8ea412319f763261c4b5ccad0140c9c5cb76727 Mon Sep 17 00:00:00 2001 From: YenHaoChen Date: Wed, 4 Jan 2023 09:24:12 +0800 Subject: [PATCH 07/15] triggers: refactor: move get_dmode() to trap_common_t from itrigger_t/etrigger_t --- riscv/triggers.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/riscv/triggers.h b/riscv/triggers.h index 7dc2419b..90c20406 100644 --- a/riscv/triggers.h +++ b/riscv/triggers.h @@ -146,6 +146,9 @@ private: }; class trap_common_t : public trigger_t { +public: + bool get_dmode() const override { return dmode; } + protected: bool dmode; bool hit; @@ -157,7 +160,6 @@ public: virtual reg_t tdata1_read(const processor_t * const proc) const noexcept override; virtual void tdata1_write(processor_t * const proc, const reg_t val, const bool allow_chain) noexcept override; - bool get_dmode() const override { return dmode; } virtual action_t get_action() const override { return action; } virtual std::optional detect_trap_match(processor_t * const proc, const trap_t& t) noexcept override; @@ -172,7 +174,6 @@ public: virtual reg_t tdata1_read(const processor_t * const proc) const noexcept override; virtual void tdata1_write(processor_t * const proc, const reg_t val, const bool allow_chain) noexcept override; - bool get_dmode() const override { return dmode; } virtual action_t get_action() const override { return action; } virtual std::optional detect_trap_match(processor_t * const proc, const trap_t& t) noexcept override; From c0cc59d5c4febaf1f45688e865e39e55b4cc72e3 Mon Sep 17 00:00:00 2001 From: YenHaoChen Date: Wed, 4 Jan 2023 09:26:47 +0800 Subject: [PATCH 08/15] triggers: refactor: move get_action() to trap_common_t from itrigger_t/etrigger_t --- riscv/triggers.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/riscv/triggers.h b/riscv/triggers.h index 90c20406..dec4d985 100644 --- a/riscv/triggers.h +++ b/riscv/triggers.h @@ -148,6 +148,7 @@ private: class trap_common_t : public trigger_t { public: bool get_dmode() const override { return dmode; } + virtual action_t get_action() const override { return action; } protected: bool dmode; @@ -160,8 +161,6 @@ public: virtual reg_t tdata1_read(const processor_t * const proc) const noexcept override; virtual void tdata1_write(processor_t * const proc, const reg_t val, const bool allow_chain) noexcept override; - virtual action_t get_action() const override { return action; } - virtual std::optional detect_trap_match(processor_t * const proc, const trap_t& t) noexcept override; private: @@ -174,8 +173,6 @@ public: virtual reg_t tdata1_read(const processor_t * const proc) const noexcept override; virtual void tdata1_write(processor_t * const proc, const reg_t val, const bool allow_chain) noexcept override; - virtual action_t get_action() const override { return action; } - virtual std::optional detect_trap_match(processor_t * const proc, const trap_t& t) noexcept override; private: From 4cf0ef9c4e71c815014f38fc2a2961c697efc741 Mon Sep 17 00:00:00 2001 From: YenHaoChen Date: Wed, 4 Jan 2023 09:35:20 +0800 Subject: [PATCH 09/15] triggers: refactor: create virtual function trap_common_t::simple_match() --- riscv/triggers.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/riscv/triggers.h b/riscv/triggers.h index dec4d985..49538ab9 100644 --- a/riscv/triggers.h +++ b/riscv/triggers.h @@ -150,6 +150,9 @@ public: bool get_dmode() const override { return dmode; } virtual action_t get_action() const override { return action; } +private: + virtual bool simple_match(bool interrupt, reg_t bit) const = 0; + protected: bool dmode; bool hit; @@ -164,7 +167,7 @@ public: virtual std::optional detect_trap_match(processor_t * const proc, const trap_t& t) noexcept override; private: - bool simple_match(bool interrupt, reg_t bit) const; + virtual bool simple_match(bool interrupt, reg_t bit) const override; bool nmi; }; @@ -176,7 +179,7 @@ public: virtual std::optional detect_trap_match(processor_t * const proc, const trap_t& t) noexcept override; private: - bool simple_match(bool interrupt, reg_t bit) const; + virtual bool simple_match(bool interrupt, reg_t bit) const override; }; class mcontrol_common_t : public trigger_t { From 6fd0169b32a17cc5a962477fb044715929ae6bd1 Mon Sep 17 00:00:00 2001 From: YenHaoChen Date: Wed, 4 Jan 2023 09:41:00 +0800 Subject: [PATCH 10/15] triggers: refactor: move detect_trap_match() to trap_common_t from itrigger_t/etrigger_t --- riscv/triggers.cc | 18 +----------------- riscv/triggers.h | 6 ++---- 2 files changed, 3 insertions(+), 21 deletions(-) diff --git a/riscv/triggers.cc b/riscv/triggers.cc index 07d14844..3f32f189 100644 --- a/riscv/triggers.cc +++ b/riscv/triggers.cc @@ -310,7 +310,7 @@ void itrigger_t::tdata1_write(processor_t * const proc, const reg_t val, const b action = legalize_action(get_field(val, CSR_ITRIGGER_ACTION)); } -std::optional itrigger_t::detect_trap_match(processor_t * const proc, const trap_t& t) noexcept +std::optional trap_common_t::detect_trap_match(processor_t * const proc, const trap_t& t) noexcept { if (!mode_match(proc->get_state())) return std::nullopt; @@ -361,22 +361,6 @@ void etrigger_t::tdata1_write(processor_t * const proc, const reg_t val, const b action = legalize_action(get_field(val, CSR_ETRIGGER_ACTION)); } -std::optional etrigger_t::detect_trap_match(processor_t * const proc, const trap_t& t) noexcept -{ - if (!mode_match(proc->get_state())) - return std::nullopt; - - auto xlen = proc->get_xlen(); - bool interrupt = (t.cause() & ((reg_t)1 << (xlen - 1))) != 0; - reg_t bit = t.cause() & ~((reg_t)1 << (xlen - 1)); - assert(bit < xlen); - if (simple_match(interrupt, bit)) { - hit = true; - return match_result_t(TIMING_AFTER, action); - } - return std::nullopt; -} - bool etrigger_t::simple_match(bool interrupt, reg_t bit) const { return !interrupt && ((tdata2 >> bit) & 1); diff --git a/riscv/triggers.h b/riscv/triggers.h index 49538ab9..16c43434 100644 --- a/riscv/triggers.h +++ b/riscv/triggers.h @@ -150,6 +150,8 @@ public: bool get_dmode() const override { return dmode; } virtual action_t get_action() const override { return action; } + virtual std::optional detect_trap_match(processor_t * const proc, const trap_t& t) noexcept override; + private: virtual bool simple_match(bool interrupt, reg_t bit) const = 0; @@ -164,8 +166,6 @@ public: virtual reg_t tdata1_read(const processor_t * const proc) const noexcept override; virtual void tdata1_write(processor_t * const proc, const reg_t val, const bool allow_chain) noexcept override; - virtual std::optional detect_trap_match(processor_t * const proc, const trap_t& t) noexcept override; - private: virtual bool simple_match(bool interrupt, reg_t bit) const override; bool nmi; @@ -176,8 +176,6 @@ public: virtual reg_t tdata1_read(const processor_t * const proc) const noexcept override; virtual void tdata1_write(processor_t * const proc, const reg_t val, const bool allow_chain) noexcept override; - virtual std::optional detect_trap_match(processor_t * const proc, const trap_t& t) noexcept override; - private: virtual bool simple_match(bool interrupt, reg_t bit) const override; }; From 0a45912d601fd27bf46c7a51e55dab5e319b15eb Mon Sep 17 00:00:00 2001 From: YenHaoChen Date: Fri, 30 Dec 2022 11:52:01 +0800 Subject: [PATCH 11/15] triggers: refactor: move textra_match() into mcontrol_common_t::detect_memory_access_match() --- riscv/triggers.cc | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/riscv/triggers.cc b/riscv/triggers.cc index 3f32f189..455fb070 100644 --- a/riscv/triggers.cc +++ b/riscv/triggers.cc @@ -190,7 +190,8 @@ std::optional mcontrol_common_t::detect_memory_access_match(proc if ((operation == triggers::OPERATION_EXECUTE && !execute) || (operation == triggers::OPERATION_STORE && !store) || (operation == triggers::OPERATION_LOAD && !load) || - !mode_match(proc->get_state())) { + !mode_match(proc->get_state()) || + !textra_match(proc)) { return std::nullopt; } @@ -477,7 +478,7 @@ std::optional module_t::detect_memory_access_match(operation_t o * entire chain did not match. This is allowed by the spec, because the final * trigger in the chain will never get `hit` set unless the entire chain * matches. */ - auto result = trigger->textra_match(proc) ? trigger->detect_memory_access_match(proc, operation, address, data) : std::nullopt; + auto result = trigger->detect_memory_access_match(proc, operation, address, data); if (result.has_value() && !trigger->get_chain()) return result; From 247f01691b5d72459976f3288f7f48d3d84cd65a Mon Sep 17 00:00:00 2001 From: YenHaoChen Date: Fri, 30 Dec 2022 11:54:37 +0800 Subject: [PATCH 12/15] triggers: refactor: move textra_match() into detect_trap_match::detect_trap_match() --- riscv/triggers.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/riscv/triggers.cc b/riscv/triggers.cc index 455fb070..c292bb56 100644 --- a/riscv/triggers.cc +++ b/riscv/triggers.cc @@ -313,7 +313,7 @@ void itrigger_t::tdata1_write(processor_t * const proc, const reg_t val, const b std::optional trap_common_t::detect_trap_match(processor_t * const proc, const trap_t& t) noexcept { - if (!mode_match(proc->get_state())) + if (!mode_match(proc->get_state()) || !textra_match(proc)) return std::nullopt; auto xlen = proc->get_xlen(); @@ -494,7 +494,7 @@ std::optional module_t::detect_trap_match(const trap_t& t) noexc return std::nullopt; for (auto trigger: triggers) { - auto result = trigger->textra_match(proc) ? trigger->detect_trap_match(proc, t) : std::nullopt; + auto result = trigger->detect_trap_match(proc, t); if (result.has_value()) return result; } From 3b3664544262f15e5f6b11b597b32eef954307eb Mon Sep 17 00:00:00 2001 From: YenHaoChen Date: Fri, 30 Dec 2022 12:01:24 +0800 Subject: [PATCH 13/15] triggers: refactor: move textra_match() to protected from public --- riscv/triggers.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/riscv/triggers.h b/riscv/triggers.h index 16c43434..650a25ed 100644 --- a/riscv/triggers.h +++ b/riscv/triggers.h @@ -83,11 +83,11 @@ public: virtual std::optional detect_memory_access_match(processor_t UNUSED * const proc, operation_t UNUSED operation, reg_t UNUSED address, std::optional UNUSED data) noexcept { return std::nullopt; } virtual std::optional detect_trap_match(processor_t UNUSED * const proc, const trap_t UNUSED & t) noexcept { return std::nullopt; } - bool textra_match(processor_t * const proc) const noexcept; protected: action_t legalize_action(reg_t val) const noexcept; bool mode_match(state_t * const state) const noexcept; + bool textra_match(processor_t * const proc) const noexcept; reg_t tdata2; bool vs = false; From 590a36e487dc9bbb8d2c13bc4fd7e9af40cff9ad Mon Sep 17 00:00:00 2001 From: YenHaoChen Date: Wed, 4 Jan 2023 09:57:04 +0800 Subject: [PATCH 14/15] triggers: refactor: create trigger_t::common_match() --- riscv/triggers.cc | 9 ++++++--- riscv/triggers.h | 1 + 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/riscv/triggers.cc b/riscv/triggers.cc index c292bb56..f451f057 100644 --- a/riscv/triggers.cc +++ b/riscv/triggers.cc @@ -54,6 +54,10 @@ void trigger_t::tdata3_write(processor_t * const proc, const reg_t val) noexcept sselect = (sselect_t)((proc->extension_enabled_const('S') && get_field(val, CSR_TEXTRA_SSELECT(xlen)) <= SSELECT_MAXVAL) ? get_field(val, CSR_TEXTRA_SSELECT(xlen)) : SSELECT_IGNORE); } +bool trigger_t::common_match(processor_t * const proc) const noexcept { + return mode_match(proc->get_state()) && textra_match(proc); +} + bool trigger_t::mode_match(state_t * const state) const noexcept { switch (state->prv) { @@ -190,8 +194,7 @@ std::optional mcontrol_common_t::detect_memory_access_match(proc if ((operation == triggers::OPERATION_EXECUTE && !execute) || (operation == triggers::OPERATION_STORE && !store) || (operation == triggers::OPERATION_LOAD && !load) || - !mode_match(proc->get_state()) || - !textra_match(proc)) { + !common_match(proc)) { return std::nullopt; } @@ -313,7 +316,7 @@ void itrigger_t::tdata1_write(processor_t * const proc, const reg_t val, const b std::optional trap_common_t::detect_trap_match(processor_t * const proc, const trap_t& t) noexcept { - if (!mode_match(proc->get_state()) || !textra_match(proc)) + if (!common_match(proc)) return std::nullopt; auto xlen = proc->get_xlen(); diff --git a/riscv/triggers.h b/riscv/triggers.h index 650a25ed..2d357095 100644 --- a/riscv/triggers.h +++ b/riscv/triggers.h @@ -86,6 +86,7 @@ public: protected: action_t legalize_action(reg_t val) const noexcept; + bool common_match(processor_t * const proc) const noexcept; bool mode_match(state_t * const state) const noexcept; bool textra_match(processor_t * const proc) const noexcept; reg_t tdata2; From 89a44eb0a28f5c530aa93ffddc17a9897397ac56 Mon Sep 17 00:00:00 2001 From: YenHaoChen Date: Wed, 4 Jan 2023 09:58:57 +0800 Subject: [PATCH 15/15] triggers: refactor: move mode_match() and textra_match() to private for protected --- riscv/triggers.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/riscv/triggers.h b/riscv/triggers.h index 2d357095..31c5b301 100644 --- a/riscv/triggers.h +++ b/riscv/triggers.h @@ -87,8 +87,6 @@ public: protected: action_t legalize_action(reg_t val) const noexcept; bool common_match(processor_t * const proc) const noexcept; - bool mode_match(state_t * const state) const noexcept; - bool textra_match(processor_t * const proc) const noexcept; reg_t tdata2; bool vs = false; @@ -99,6 +97,8 @@ protected: private: unsigned legalize_mhselect(bool h_enabled) const noexcept; + bool mode_match(state_t * const state) const noexcept; + bool textra_match(processor_t * const proc) const noexcept; struct mhselect_interpretation { const unsigned mhselect;