Initialize some uninitialized state

riscv/debug_module.cc

@@ -43,7 +43,8 @@ debug_module_t::debug_module_t(sim_t *sim, const debug_module_config_t &config)
   // The spec lets a debugger select nonexistent harts. Create hart_state for
   // them because I'm too lazy to add the code to just ignore accesses.
   hart_state(1 << field_width(sim->nprocs())),
-  hart_array_mask(sim->nprocs())
+  hart_array_mask(sim->nprocs()),
+  rti_remaining(0)
 {
   D(fprintf(stderr, "debug_data_start=0x%x\n", debug_data_start));
   D(fprintf(stderr, "debug_progbuf_start=0x%x\n", debug_progbuf_start));

riscv/processor.cc

@@ -262,6 +262,8 @@ void state_t::reset(reg_t max_isa)
 
   memset(this->tdata2, 0, sizeof(this->tdata2));
   debug_mode = false;
+  single_step = STEP_NONE;
+  memset(this->mcontrol, 0, sizeof(this->mcontrol));
 
   memset(this->pmpcfg, 0, sizeof(this->pmpcfg));
   memset(this->pmpaddr, 0, sizeof(this->pmpaddr));