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@ -271,8 +271,11 @@ void sim_t::make_dtb() |
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" riscv,isa = \"" << procs[i]->isa_string << "\";\n" |
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" mmu-type = \"riscv," << (procs[i]->max_xlen <= 32 ? "sv32" : "sv48") << "\";\n" |
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" clock-frequency = <" << CPU_HZ << ">;\n" |
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" interrupt-controller;\n" |
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" #interrupt-cells = <1>;\n" |
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" CPU" << i << "_intc: interrupt-controller {\n" |
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" #interrupt-cells = <1>;\n" |
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" interrupt-controller;\n" |
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" compatible = \"riscv,cpu-intc\";\n" |
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" };\n" |
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" };\n"; |
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} |
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reg_t membs = DRAM_BASE; |
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@ -286,13 +289,13 @@ void sim_t::make_dtb() |
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" soc {\n" |
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" #address-cells = <2>;\n" |
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" #size-cells = <2>;\n" |
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" compatible = \"ucbbar,spike-bare-soc\";\n" |
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" compatible = \"ucbbar,spike-bare-soc\", \"simple-bus\";\n" |
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" ranges;\n" |
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" clint@" << CLINT_BASE << " {\n" |
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" compatible = \"riscv,clint0\";\n" |
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" interrupts-extended = <" << std::dec; |
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for (size_t i = 0; i < procs.size(); i++) |
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s << "&CPU" << i << " 3 &CPU" << i << " 7 "; |
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s << "&CPU" << i << "_intc 3 &CPU" << i << "_intc 7 "; |
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reg_t clintbs = CLINT_BASE; |
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reg_t clintsz = CLINT_SIZE; |
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s << std::hex << ">;\n" |
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