Remove cfg_arg_t from cfg_t

Argument parsing should be scoped to the code which constucts cfg_t

ci-tests/testlib.c

@@ -43,7 +43,7 @@ int main()
     .support_impebreak = true
   };
   std::vector<std::pair<reg_t, abstract_mem_t*>> mems =
-      make_mems(cfg.mem_layout());
+      make_mems(cfg.mem_layout);
   sim_t sim(&cfg, false,
             mems,
             plugin_devices,

riscv/cfg.h

@@ -89,24 +89,24 @@ public:
       trigger_count(default_trigger_count)
   {}
 
-  cfg_arg_t<std::pair<reg_t, reg_t>> initrd_bounds;
-  cfg_arg_t<const char *>            bootargs;
-  cfg_arg_t<const char *>            isa;
-  cfg_arg_t<const char *>            priv;
-  cfg_arg_t<const char *>            varch;
-  bool                               misaligned;
-  endianness_t                       endianness;
-  reg_t                              pmpregions;
-  reg_t                              pmpgranularity;
-  cfg_arg_t<std::vector<mem_cfg_t>>  mem_layout;
-  std::optional<reg_t>               start_pc;
-  cfg_arg_t<std::vector<size_t>>     hartids;
-  bool                               explicit_hartids;
-  cfg_arg_t<bool>                    real_time_clint;
-  reg_t                              trigger_count;
-
-  size_t nprocs() const { return hartids().size(); }
-  size_t max_hartid() const { return hartids().back(); }
+  std::pair<reg_t, reg_t> initrd_bounds;
+  const char *            bootargs;
+  const char *            isa;
+  const char *            priv;
+  const char *            varch;
+  bool                    misaligned;
+  endianness_t            endianness;
+  reg_t                   pmpregions;
+  reg_t                   pmpgranularity;
+  std::vector<mem_cfg_t>  mem_layout;
+  std::optional<reg_t>    start_pc;
+  std::vector<size_t>     hartids;
+  bool                    explicit_hartids;
+  bool                    real_time_clint;
+  reg_t                   trigger_count;
+
+  size_t nprocs() const { return hartids.size(); }
+  size_t max_hartid() const { return hartids.back(); }
 };
 
 #endif

riscv/clint.cc

@@ -121,7 +121,7 @@ clint_t* clint_parse_from_fdt(const void* fdt, const sim_t* sim, reg_t* base,
   if (fdt_parse_clint(fdt, base, "riscv,clint0") == 0)
     return new clint_t(sim,
                        sim->CPU_HZ / sim->INSNS_PER_RTC_TICK,
-                       sim->get_cfg().real_time_clint());
+                       sim->get_cfg().real_time_clint);
   else
     return nullptr;
 }

riscv/debug_module.cc

@@ -514,7 +514,7 @@ bool debug_module_t::dmi_read(unsigned address, uint32_t *value)
           unsigned base = hawindowsel * 32;
           for (unsigned i = 0; i < 32; i++) {
             unsigned n = base + i;
-            if (n < sim->get_cfg().nprocs() && hart_array_mask[sim->get_cfg().hartids()[n]]) {
+            if (n < sim->get_cfg().nprocs() && hart_array_mask[sim->get_cfg().hartids[n]]) {
               result |= 1 << i;
             }
           }
@@ -916,7 +916,7 @@ bool debug_module_t::dmi_write(unsigned address, uint32_t value)
           for (unsigned i = 0; i < 32; i++) {
             unsigned n = base + i;
             if (n < sim->get_cfg().nprocs()) {
-              hart_array_mask[sim->get_cfg().hartids()[n]] = (value >> i) & 1;
+              hart_array_mask[sim->get_cfg().hartids[n]] = (value >> i) & 1;
             }
           }
         }
@@ -1030,5 +1030,5 @@ hart_debug_state_t& debug_module_t::selected_hart_state()
 
 size_t debug_module_t::selected_hart_id() const
 {
-  return sim->get_cfg().hartids().at(dmcontrol.hartsel);
+  return sim->get_cfg().hartids.at(dmcontrol.hartsel);
 }

riscv/processor.cc

@@ -54,7 +54,7 @@ processor_t::processor_t(const isa_parser_t *isa, const cfg_t *cfg,
   }
 #endif
 
-  parse_varch_string(cfg->varch());
+  parse_varch_string(cfg->varch);
 
   register_base_instructions();
   mmu = new mmu_t(sim, cfg->endianness, this);

riscv/sim.cc

@@ -46,7 +46,7 @@ sim_t::sim_t(const cfg_t *cfg, bool halted,
              bool socket_enabled,
              FILE *cmd_file) // needed for command line option --cmd
   : htif_t(args),
-    isa(cfg->isa(), cfg->priv()),
+    isa(cfg->isa, cfg->priv),
     cfg(cfg),
     mems(mems),
     procs(std::max(cfg->nprocs(), size_t(1))),
@@ -99,9 +99,9 @@ sim_t::sim_t(const cfg_t *cfg, bool halted,
   debug_mmu = new mmu_t(this, cfg->endianness, NULL);
 
   for (size_t i = 0; i < cfg->nprocs(); i++) {
-    procs[i] = new processor_t(&isa, cfg, this, cfg->hartids()[i], halted,
+    procs[i] = new processor_t(&isa, cfg, this, cfg->hartids[i], halted,
                                log_file.get(), sout_);
-    harts[cfg->hartids()[i]] = procs[i];
+    harts[cfg->hartids[i]] = procs[i];
   }
 
   // When running without using a dtb, skip the fdt-based configuration steps
@@ -134,13 +134,13 @@ sim_t::sim_t(const cfg_t *cfg, bool halted,
     strstream << fin.rdbuf();
     dtb = strstream.str();
   } else {
-    std::pair<reg_t, reg_t> initrd_bounds = cfg->initrd_bounds();
+    std::pair<reg_t, reg_t> initrd_bounds = cfg->initrd_bounds;
     std::string device_nodes;
     for (const device_factory_t *factory : device_factories)
       device_nodes.append(factory->generate_dts(this));
     dts = make_dts(INSNS_PER_RTC_TICK, CPU_HZ,
                    initrd_bounds.first, initrd_bounds.second,
-                   cfg->bootargs(), cfg->pmpregions, cfg->pmpgranularity,
+                   cfg->bootargs, cfg->pmpregions, cfg->pmpgranularity,
                    procs, mems, device_nodes);
     dtb = dts_compile(dts);
   }

spike_main/spike.cc

@@ -493,10 +493,10 @@ int main(int argc, char** argv)
     help();
 
   std::vector<std::pair<reg_t, abstract_mem_t*>> mems =
-      make_mems(cfg.mem_layout());
+      make_mems(cfg.mem_layout);
 
   if (kernel && check_file_exists(kernel)) {
-    const char *isa = cfg.isa();
+    const char *isa = cfg.isa;
     kernel_size = get_file_size(kernel);
     if (isa[2] == '6' && isa[3] == '4')
       kernel_offset = 0x200000;