From 057139ab90b8e03b71825e8f2be7cab58fef0f90 Mon Sep 17 00:00:00 2001 From: Rupert Swarbrick Date: Thu, 31 Mar 2022 09:48:43 +0100 Subject: [PATCH 1/8] Fix debug messages about invalid pmpregions/mmu-types This was using the number of CPUs in total, rather than the CPU whose PMP regions / MMU type it was actually parsing. --- riscv/sim.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/riscv/sim.cc b/riscv/sim.cc index be608647..90fa210a 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -129,7 +129,7 @@ sim_t::sim_t(const cfg_t *cfg, const char* varch, bool halted, bool real_time_cl procs[cpu_idx]->set_pmp_num(pmp_num); } else { std::cerr << "core (" - << hartids.size() + << cpu_idx << ") doesn't have valid 'riscv,pmpregions'" << pmp_num << ").\n"; exit(1); @@ -159,7 +159,7 @@ sim_t::sim_t(const cfg_t *cfg, const char* varch, bool halted, bool real_time_cl //has been set in the beginning } else { std::cerr << "core (" - << hartids.size() + << cpu_idx << ") has an invalid 'mmu-type': " << mmu_type << ").\n"; exit(1); From 970466e6ebcf4957f131fde8b62ca10fb70b2bd6 Mon Sep 17 00:00:00 2001 From: Rupert Swarbrick Date: Thu, 24 Mar 2022 22:00:46 +0000 Subject: [PATCH 2/8] Move start_pc into cfg_t --- riscv/cfg.h | 2 ++ riscv/sim.cc | 5 ++--- riscv/sim.h | 3 +-- spike_main/spike.cc | 5 ++--- 4 files changed, 7 insertions(+), 8 deletions(-) diff --git a/riscv/cfg.h b/riscv/cfg.h index e844738b..1e08f80e 100644 --- a/riscv/cfg.h +++ b/riscv/cfg.h @@ -2,6 +2,7 @@ #ifndef _RISCV_CFG_H #define _RISCV_CFG_H +#include #include "decode.h" #include "mmu.h" #include @@ -70,6 +71,7 @@ public: cfg_arg_t isa; cfg_arg_t priv; cfg_arg_t> mem_layout; + std::optional start_pc; }; #endif diff --git a/riscv/sim.cc b/riscv/sim.cc index 90fa210a..4e3dd409 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -29,7 +29,7 @@ static void handle_signal(int sig) } sim_t::sim_t(const cfg_t *cfg, const char* varch, bool halted, bool real_time_clint, - reg_t start_pc, std::vector> mems, + std::vector> mems, std::vector> plugin_devices, const std::vector& args, std::vector const hartids, @@ -46,7 +46,6 @@ sim_t::sim_t(const cfg_t *cfg, const char* varch, bool halted, bool real_time_cl mems(mems), plugin_devices(plugin_devices), procs(std::max(cfg->nprocs(), size_t(1))), - start_pc(start_pc), dtb_file(dtb_file ? dtb_file : ""), dtb_enabled(dtb_enabled), log_file(log_path), @@ -334,7 +333,7 @@ void sim_t::set_rom() { const int reset_vec_size = 8; - start_pc = start_pc == reg_t(-1) ? get_entry_point() : start_pc; + reg_t start_pc = cfg->start_pc.value_or(get_entry_point()); uint32_t reset_vec[reset_vec_size] = { 0x297, // auipc t0,0x0 diff --git a/riscv/sim.h b/riscv/sim.h index fc20a2c8..6acc4409 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -33,7 +33,7 @@ class sim_t : public htif_t, public simif_t { public: sim_t(const cfg_t *cfg, const char* varch, bool halted, bool real_time_clint, - reg_t start_pc, std::vector> mems, + std::vector> mems, std::vector> plugin_devices, const std::vector& args, const std::vector hartids, const debug_module_config_t &dm_config, const char *log_path, @@ -76,7 +76,6 @@ private: mmu_t* debug_mmu; // debug port into main memory std::vector procs; std::pair initrd_range; - reg_t start_pc; std::string dts; std::string dtb; std::string dtb_file; diff --git a/spike_main/spike.cc b/spike_main/spike.cc index 3080efbd..7791fbfc 100644 --- a/spike_main/spike.cc +++ b/spike_main/spike.cc @@ -232,7 +232,6 @@ int main(int argc, char** argv) bool real_time_clint = false; const char* kernel = NULL; reg_t kernel_offset, kernel_size; - reg_t start_pc = reg_t(-1); std::vector> plugin_devices; std::unique_ptr ic; std::unique_ptr dc; @@ -335,7 +334,7 @@ int main(int argc, char** argv) // I wanted to use --halted, but for some reason that doesn't work. parser.option('H', 0, 0, [&](const char* s){halted = true;}); parser.option(0, "rbb-port", 1, [&](const char* s){use_rbb = true; rbb_port = atoul_safe(s);}); - parser.option(0, "pc", 1, [&](const char* s){start_pc = strtoull(s, 0, 0);}); + parser.option(0, "pc", 1, [&](const char* s){cfg.start_pc = strtoull(s, 0, 0);}); parser.option(0, "hartids", 1, hartids_parser); parser.option(0, "ic", 1, [&](const char* s){ic.reset(new icache_sim_t(s));}); parser.option(0, "dc", 1, [&](const char* s){dc.reset(new dcache_sim_t(s));}); @@ -457,7 +456,7 @@ int main(int argc, char** argv) #endif sim_t s(&cfg, varch, halted, real_time_clint, - start_pc, mems, plugin_devices, htif_args, + mems, plugin_devices, htif_args, std::move(hartids), dm_config, log_path, dtb_enabled, dtb_file, #ifdef HAVE_BOOST_ASIO io_service_ptr, acceptor_ptr, From 0d90f75dc4b5e28b2e3b3f35debaae1169c69d98 Mon Sep 17 00:00:00 2001 From: Rupert Swarbrick Date: Mon, 11 Apr 2022 11:11:39 +0100 Subject: [PATCH 3/8] Slightly refactor --hartids parsing in spike.cc We now parse to a std::vector and then set the "hartids" variable to the result. There is a slight functional change here, in that if you pass "--hartids 1,2,3 --hartids 4,5", you'll now get 2 cores with ids of 4,5 rather than 5 cores with ids of 1,2,3,4,5. This is what most tools do with repeated command line arguments and I suspect the old behaviour was actually by accident! --- spike_main/spike.cc | 29 ++++++++++++++++------------- 1 file changed, 16 insertions(+), 13 deletions(-) diff --git a/spike_main/spike.cc b/spike_main/spike.cc index 7791fbfc..25d7c692 100644 --- a/spike_main/spike.cc +++ b/spike_main/spike.cc @@ -220,6 +220,21 @@ static unsigned long atoul_nonzero_safe(const char* s) return res; } +static std::vector parse_hartids(const char *s) +{ + std::string const str(s); + std::stringstream stream(str); + std::vector hartids; + + int n; + while (stream >> n) { + hartids.push_back(n); + if (stream.peek() == ',') stream.ignore(); + } + + return hartids; +} + int main(int argc, char** argv) { bool debug = false; @@ -265,18 +280,6 @@ int main(int argc, char** argv) /*default_priv=*/DEFAULT_PRIV, /*default_mem_layout=*/parse_mem_layout("2048")); - auto const hartids_parser = [&](const char *s) { - std::string const str(s); - std::stringstream stream(str); - - int n; - while (stream >> n) - { - hartids.push_back(n); - if (stream.peek() == ',') stream.ignore(); - } - }; - auto const device_parser = [&plugin_devices](const char *s) { const std::string str(s); std::istringstream stream(str); @@ -335,7 +338,7 @@ int main(int argc, char** argv) parser.option('H', 0, 0, [&](const char* s){halted = true;}); parser.option(0, "rbb-port", 1, [&](const char* s){use_rbb = true; rbb_port = atoul_safe(s);}); parser.option(0, "pc", 1, [&](const char* s){cfg.start_pc = strtoull(s, 0, 0);}); - parser.option(0, "hartids", 1, hartids_parser); + parser.option(0, "hartids", 1, [&](const char* s){hartids = parse_hartids(s);}); parser.option(0, "ic", 1, [&](const char* s){ic.reset(new icache_sim_t(s));}); parser.option(0, "dc", 1, [&](const char* s){dc.reset(new dcache_sim_t(s));}); parser.option(0, "l2", 1, [&](const char* s){l2.reset(cache_sim_t::construct(s, "L2$"));}); From e4aaed1b7b08998a6b6aefa34f7c575e292dde62 Mon Sep 17 00:00:00 2001 From: Rupert Swarbrick Date: Mon, 11 Apr 2022 10:47:50 +0100 Subject: [PATCH 4/8] Move the "default hartids" logic from sim.cc into spike.cc This moves another part of the "configuration" out of the generic sim.cc code. --- riscv/sim.cc | 13 +++---------- spike_main/spike.cc | 16 ++++++++++++++++ 2 files changed, 19 insertions(+), 10 deletions(-) diff --git a/riscv/sim.cc b/riscv/sim.cc index 4e3dd409..d285183f 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -63,6 +63,8 @@ sim_t::sim_t(const cfg_t *cfg, const char* varch, bool halted, bool real_time_cl remote_bitbang(NULL), debug_module(this, dm_config) { + assert(hartids.size() == cfg->nprocs()); + signal(SIGINT, &handle_signal); sout_.rdbuf(std::cerr.rdbuf()); // debug output goes to stderr by default @@ -77,17 +79,8 @@ sim_t::sim_t(const cfg_t *cfg, const char* varch, bool halted, bool real_time_cl debug_mmu = new mmu_t(this, NULL); - if (! (hartids.empty() || hartids.size() == nprocs())) { - std::cerr << "Number of specified hartids (" - << hartids.size() - << ") doesn't match number of processors (" - << nprocs() << ").\n"; - exit(1); - } - for (size_t i = 0; i < nprocs(); i++) { - int hart_id = hartids.empty() ? i : hartids[i]; - procs[i] = new processor_t(&isa, varch, this, hart_id, halted, + procs[i] = new processor_t(&isa, varch, this, hartids[i], halted, log_file.get(), sout_); } diff --git a/spike_main/spike.cc b/spike_main/spike.cc index 25d7c692..a3c18d18 100644 --- a/spike_main/spike.cc +++ b/spike_main/spike.cc @@ -458,6 +458,22 @@ int main(int argc, char** argv) } #endif + if (!hartids.empty()) { + if (cfg.nprocs.overridden() && (cfg.nprocs() != hartids.size())) { + std::cerr << "Number of specified hartids (" + << hartids.size() + << ") doesn't match specified number of processors (" + << cfg.nprocs() << ").\n"; + exit(1); + } + } else { + // Set default set of hartids based on nprocs + hartids.reserve(cfg.nprocs()); + for (size_t i = 0; i < cfg.nprocs(); ++i) { + hartids.push_back(i); + } + } + sim_t s(&cfg, varch, halted, real_time_clint, mems, plugin_devices, htif_args, std::move(hartids), dm_config, log_path, dtb_enabled, dtb_file, From 61b4f61a857de65d1a341f55597bfceeb7b7690d Mon Sep 17 00:00:00 2001 From: Rupert Swarbrick Date: Mon, 11 Apr 2022 10:59:20 +0100 Subject: [PATCH 5/8] Move hartids into cfg_t The only slightly difficult thing here is that hartids will always be considered "overridden" by the time we get to sim_t::sim_t (either overridden by a command line argument, or overridden when we set default hartids just before the constructor). To allow downstream code to distinguish between "I picked IDs 0, 1, 2, 3 because the user asked for 4 processors" and "The user explicitly asked for IDs 0, 1, 2, 3", we have an extra explicit_hartids field. --- riscv/cfg.h | 9 +++++++-- riscv/sim.cc | 7 +++---- riscv/sim.h | 2 +- spike_main/spike.cc | 28 +++++++++++++++++----------- 4 files changed, 28 insertions(+), 18 deletions(-) diff --git a/riscv/cfg.h b/riscv/cfg.h index 1e08f80e..6410c819 100644 --- a/riscv/cfg.h +++ b/riscv/cfg.h @@ -56,13 +56,16 @@ public: cfg_t(std::pair default_initrd_bounds, const char *default_bootargs, size_t default_nprocs, const char *default_isa, const char *default_priv, - const std::vector &default_mem_layout) + const std::vector &default_mem_layout, + const std::vector default_hartids) : initrd_bounds(default_initrd_bounds), bootargs(default_bootargs), nprocs(default_nprocs), isa(default_isa), priv(default_priv), - mem_layout(default_mem_layout) + mem_layout(default_mem_layout), + hartids(default_hartids), + explicit_hartids(false) {} cfg_arg_t> initrd_bounds; @@ -72,6 +75,8 @@ public: cfg_arg_t priv; cfg_arg_t> mem_layout; std::optional start_pc; + cfg_arg_t> hartids; + bool explicit_hartids; }; #endif diff --git a/riscv/sim.cc b/riscv/sim.cc index d285183f..d7585cae 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -32,7 +32,6 @@ sim_t::sim_t(const cfg_t *cfg, const char* varch, bool halted, bool real_time_cl std::vector> mems, std::vector> plugin_devices, const std::vector& args, - std::vector const hartids, const debug_module_config_t &dm_config, const char *log_path, bool dtb_enabled, const char *dtb_file, @@ -63,7 +62,7 @@ sim_t::sim_t(const cfg_t *cfg, const char* varch, bool halted, bool real_time_cl remote_bitbang(NULL), debug_module(this, dm_config) { - assert(hartids.size() == cfg->nprocs()); + assert(cfg->hartids().size() == cfg->nprocs()); signal(SIGINT, &handle_signal); @@ -79,8 +78,8 @@ sim_t::sim_t(const cfg_t *cfg, const char* varch, bool halted, bool real_time_cl debug_mmu = new mmu_t(this, NULL); - for (size_t i = 0; i < nprocs(); i++) { - procs[i] = new processor_t(&isa, varch, this, hartids[i], halted, + for (size_t i = 0; i < cfg->nprocs(); i++) { + procs[i] = new processor_t(&isa, varch, this, cfg->hartids()[i], halted, log_file.get(), sout_); } diff --git a/riscv/sim.h b/riscv/sim.h index 6acc4409..de82ccda 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -35,7 +35,7 @@ public: sim_t(const cfg_t *cfg, const char* varch, bool halted, bool real_time_clint, std::vector> mems, std::vector> plugin_devices, - const std::vector& args, const std::vector hartids, + const std::vector& args, const debug_module_config_t &dm_config, const char *log_path, bool dtb_enabled, const char *dtb_file, #ifdef HAVE_BOOST_ASIO diff --git a/spike_main/spike.cc b/spike_main/spike.cc index a3c18d18..12b8dc0c 100644 --- a/spike_main/spike.cc +++ b/spike_main/spike.cc @@ -272,13 +272,13 @@ int main(int argc, char** argv) .support_haltgroups = true, .support_impebreak = true }; - std::vector hartids; cfg_t cfg(/*default_initrd_bounds=*/std::make_pair((reg_t)0, (reg_t)0), /*default_bootargs=*/nullptr, /*default_nprocs=*/1, /*default_isa=*/DEFAULT_ISA, /*default_priv=*/DEFAULT_PRIV, - /*default_mem_layout=*/parse_mem_layout("2048")); + /*default_mem_layout=*/parse_mem_layout("2048"), + /*default_hartids=*/std::vector()); auto const device_parser = [&plugin_devices](const char *s) { const std::string str(s); @@ -338,7 +338,10 @@ int main(int argc, char** argv) parser.option('H', 0, 0, [&](const char* s){halted = true;}); parser.option(0, "rbb-port", 1, [&](const char* s){use_rbb = true; rbb_port = atoul_safe(s);}); parser.option(0, "pc", 1, [&](const char* s){cfg.start_pc = strtoull(s, 0, 0);}); - parser.option(0, "hartids", 1, [&](const char* s){hartids = parse_hartids(s);}); + parser.option(0, "hartids", 1, [&](const char* s){ + cfg.hartids = parse_hartids(s); + cfg.explicit_hartids = true; + }); parser.option(0, "ic", 1, [&](const char* s){ic.reset(new icache_sim_t(s));}); parser.option(0, "dc", 1, [&](const char* s){dc.reset(new dcache_sim_t(s));}); parser.option(0, "l2", 1, [&](const char* s){l2.reset(cache_sim_t::construct(s, "L2$"));}); @@ -458,25 +461,28 @@ int main(int argc, char** argv) } #endif - if (!hartids.empty()) { - if (cfg.nprocs.overridden() && (cfg.nprocs() != hartids.size())) { + if (cfg.explicit_hartids) { + if (cfg.nprocs.overridden() && (cfg.nprocs() != cfg.hartids().size())) { std::cerr << "Number of specified hartids (" - << hartids.size() + << cfg.hartids().size() << ") doesn't match specified number of processors (" << cfg.nprocs() << ").\n"; exit(1); } } else { - // Set default set of hartids based on nprocs - hartids.reserve(cfg.nprocs()); + // Set default set of hartids based on nprocs, but don't set the + // explicit_hartids flag (which means that downstream code can know that + // we've only set the number of harts, not explicitly chosen their IDs). + std::vector default_hartids; + default_hartids.reserve(cfg.nprocs()); for (size_t i = 0; i < cfg.nprocs(); ++i) { - hartids.push_back(i); + default_hartids.push_back(i); } + cfg.hartids = default_hartids; } sim_t s(&cfg, varch, halted, real_time_clint, - mems, plugin_devices, htif_args, - std::move(hartids), dm_config, log_path, dtb_enabled, dtb_file, + mems, plugin_devices, htif_args, dm_config, log_path, dtb_enabled, dtb_file, #ifdef HAVE_BOOST_ASIO io_service_ptr, acceptor_ptr, #endif From 9f0cf3437051b1ff0da9f087d001f768c2242870 Mon Sep 17 00:00:00 2001 From: Rupert Swarbrick Date: Mon, 11 Apr 2022 11:07:08 +0100 Subject: [PATCH 6/8] Remove nprocs from cfg_t Now we have hartids, we can remove nprocs so that we have a single source of truth. --- riscv/cfg.h | 6 +++--- riscv/sim.cc | 2 -- spike_main/spike.cc | 15 ++++++++------- 3 files changed, 11 insertions(+), 12 deletions(-) diff --git a/riscv/cfg.h b/riscv/cfg.h index 6410c819..1e40aeda 100644 --- a/riscv/cfg.h +++ b/riscv/cfg.h @@ -54,13 +54,12 @@ class cfg_t { public: cfg_t(std::pair default_initrd_bounds, - const char *default_bootargs, size_t default_nprocs, + const char *default_bootargs, const char *default_isa, const char *default_priv, const std::vector &default_mem_layout, const std::vector default_hartids) : initrd_bounds(default_initrd_bounds), bootargs(default_bootargs), - nprocs(default_nprocs), isa(default_isa), priv(default_priv), mem_layout(default_mem_layout), @@ -70,13 +69,14 @@ public: cfg_arg_t> initrd_bounds; cfg_arg_t bootargs; - cfg_arg_t nprocs; cfg_arg_t isa; cfg_arg_t priv; cfg_arg_t> mem_layout; std::optional start_pc; cfg_arg_t> hartids; bool explicit_hartids; + + size_t nprocs() const { return hartids().size(); } }; #endif diff --git a/riscv/sim.cc b/riscv/sim.cc index d7585cae..6945c643 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -62,8 +62,6 @@ sim_t::sim_t(const cfg_t *cfg, const char* varch, bool halted, bool real_time_cl remote_bitbang(NULL), debug_module(this, dm_config) { - assert(cfg->hartids().size() == cfg->nprocs()); - signal(SIGINT, &handle_signal); sout_.rdbuf(std::cerr.rdbuf()); // debug output goes to stderr by default diff --git a/spike_main/spike.cc b/spike_main/spike.cc index 12b8dc0c..63954669 100644 --- a/spike_main/spike.cc +++ b/spike_main/spike.cc @@ -272,9 +272,10 @@ int main(int argc, char** argv) .support_haltgroups = true, .support_impebreak = true }; + cfg_arg_t nprocs(1); + cfg_t cfg(/*default_initrd_bounds=*/std::make_pair((reg_t)0, (reg_t)0), /*default_bootargs=*/nullptr, - /*default_nprocs=*/1, /*default_isa=*/DEFAULT_ISA, /*default_priv=*/DEFAULT_PRIV, /*default_mem_layout=*/parse_mem_layout("2048"), @@ -332,7 +333,7 @@ int main(int argc, char** argv) #ifdef HAVE_BOOST_ASIO parser.option('s', 0, 0, [&](const char* s){socket = true;}); #endif - parser.option('p', 0, 1, [&](const char* s){cfg.nprocs = atoul_nonzero_safe(s);}); + parser.option('p', 0, 1, [&](const char* s){nprocs = atoul_nonzero_safe(s);}); parser.option('m', 0, 1, [&](const char* s){cfg.mem_layout = parse_mem_layout(s);}); // I wanted to use --halted, but for some reason that doesn't work. parser.option('H', 0, 0, [&](const char* s){halted = true;}); @@ -462,11 +463,11 @@ int main(int argc, char** argv) #endif if (cfg.explicit_hartids) { - if (cfg.nprocs.overridden() && (cfg.nprocs() != cfg.hartids().size())) { + if (nprocs.overridden() && (nprocs() != cfg.nprocs())) { std::cerr << "Number of specified hartids (" - << cfg.hartids().size() + << cfg.nprocs() << ") doesn't match specified number of processors (" - << cfg.nprocs() << ").\n"; + << nprocs() << ").\n"; exit(1); } } else { @@ -474,8 +475,8 @@ int main(int argc, char** argv) // explicit_hartids flag (which means that downstream code can know that // we've only set the number of harts, not explicitly chosen their IDs). std::vector default_hartids; - default_hartids.reserve(cfg.nprocs()); - for (size_t i = 0; i < cfg.nprocs(); ++i) { + default_hartids.reserve(nprocs()); + for (size_t i = 0; i < nprocs(); ++i) { default_hartids.push_back(i); } cfg.hartids = default_hartids; From acf88fe13184f397f450b31574fc9f8d7e3944b4 Mon Sep 17 00:00:00 2001 From: Rupert Swarbrick Date: Thu, 24 Mar 2022 23:03:30 +0000 Subject: [PATCH 7/8] Move varch into cfg_t --- riscv/cfg.h | 3 +++ riscv/sim.cc | 4 ++-- riscv/sim.h | 2 +- spike_main/spike.cc | 6 +++--- 4 files changed, 9 insertions(+), 6 deletions(-) diff --git a/riscv/cfg.h b/riscv/cfg.h index 1e40aeda..a2c04a79 100644 --- a/riscv/cfg.h +++ b/riscv/cfg.h @@ -56,12 +56,14 @@ public: cfg_t(std::pair default_initrd_bounds, const char *default_bootargs, const char *default_isa, const char *default_priv, + const char *default_varch, const std::vector &default_mem_layout, const std::vector default_hartids) : initrd_bounds(default_initrd_bounds), bootargs(default_bootargs), isa(default_isa), priv(default_priv), + varch(default_varch), mem_layout(default_mem_layout), hartids(default_hartids), explicit_hartids(false) @@ -71,6 +73,7 @@ public: cfg_arg_t bootargs; cfg_arg_t isa; cfg_arg_t priv; + cfg_arg_t varch; cfg_arg_t> mem_layout; std::optional start_pc; cfg_arg_t> hartids; diff --git a/riscv/sim.cc b/riscv/sim.cc index 6945c643..832be7a6 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -28,7 +28,7 @@ static void handle_signal(int sig) signal(sig, &handle_signal); } -sim_t::sim_t(const cfg_t *cfg, const char* varch, bool halted, bool real_time_clint, +sim_t::sim_t(const cfg_t *cfg, bool halted, bool real_time_clint, std::vector> mems, std::vector> plugin_devices, const std::vector& args, @@ -77,7 +77,7 @@ sim_t::sim_t(const cfg_t *cfg, const char* varch, bool halted, bool real_time_cl debug_mmu = new mmu_t(this, NULL); for (size_t i = 0; i < cfg->nprocs(); i++) { - procs[i] = new processor_t(&isa, varch, this, cfg->hartids()[i], halted, + procs[i] = new processor_t(&isa, cfg->varch(), this, cfg->hartids()[i], halted, log_file.get(), sout_); } diff --git a/riscv/sim.h b/riscv/sim.h index de82ccda..4f7a3845 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -32,7 +32,7 @@ class remote_bitbang_t; class sim_t : public htif_t, public simif_t { public: - sim_t(const cfg_t *cfg, const char* varch, bool halted, bool real_time_clint, + sim_t(const cfg_t *cfg, bool halted, bool real_time_clint, std::vector> mems, std::vector> plugin_devices, const std::vector& args, diff --git a/spike_main/spike.cc b/spike_main/spike.cc index 63954669..ab4a6750 100644 --- a/spike_main/spike.cc +++ b/spike_main/spike.cc @@ -256,7 +256,6 @@ int main(int argc, char** argv) const char *log_path = nullptr; std::vector> extensions; const char* initrd = NULL; - const char* varch = DEFAULT_VARCH; const char* dtb_file = NULL; uint16_t rbb_port = 0; bool use_rbb = false; @@ -278,6 +277,7 @@ int main(int argc, char** argv) /*default_bootargs=*/nullptr, /*default_isa=*/DEFAULT_ISA, /*default_priv=*/DEFAULT_PRIV, + /*default_varch=*/DEFAULT_VARCH, /*default_mem_layout=*/parse_mem_layout("2048"), /*default_hartids=*/std::vector()); @@ -349,7 +349,7 @@ int main(int argc, char** argv) parser.option(0, "log-cache-miss", 0, [&](const char* s){log_cache = true;}); parser.option(0, "isa", 1, [&](const char* s){cfg.isa = s;}); parser.option(0, "priv", 1, [&](const char* s){cfg.priv = s;}); - parser.option(0, "varch", 1, [&](const char* s){varch = s;}); + parser.option(0, "varch", 1, [&](const char* s){cfg.varch = s;}); parser.option(0, "device", 1, device_parser); parser.option(0, "extension", 1, [&](const char* s){extensions.push_back(find_extension(s));}); parser.option(0, "dump-dts", 0, [&](const char *s){dump_dts = true;}); @@ -482,7 +482,7 @@ int main(int argc, char** argv) cfg.hartids = default_hartids; } - sim_t s(&cfg, varch, halted, real_time_clint, + sim_t s(&cfg, halted, real_time_clint, mems, plugin_devices, htif_args, dm_config, log_path, dtb_enabled, dtb_file, #ifdef HAVE_BOOST_ASIO io_service_ptr, acceptor_ptr, From 8e70cdfa611b5eb30fba49235aab5ce2cffd4c43 Mon Sep 17 00:00:00 2001 From: Rupert Swarbrick Date: Thu, 24 Mar 2022 23:06:43 +0000 Subject: [PATCH 8/8] Move real_time_clint into cfg_t --- riscv/cfg.h | 7 +++++-- riscv/sim.cc | 4 ++-- riscv/sim.h | 2 +- spike_main/spike.cc | 8 ++++---- 4 files changed, 12 insertions(+), 9 deletions(-) diff --git a/riscv/cfg.h b/riscv/cfg.h index a2c04a79..6369bd84 100644 --- a/riscv/cfg.h +++ b/riscv/cfg.h @@ -58,7 +58,8 @@ public: const char *default_isa, const char *default_priv, const char *default_varch, const std::vector &default_mem_layout, - const std::vector default_hartids) + const std::vector default_hartids, + bool default_real_time_clint) : initrd_bounds(default_initrd_bounds), bootargs(default_bootargs), isa(default_isa), @@ -66,7 +67,8 @@ public: varch(default_varch), mem_layout(default_mem_layout), hartids(default_hartids), - explicit_hartids(false) + explicit_hartids(false), + real_time_clint(default_real_time_clint) {} cfg_arg_t> initrd_bounds; @@ -78,6 +80,7 @@ public: std::optional start_pc; cfg_arg_t> hartids; bool explicit_hartids; + cfg_arg_t real_time_clint; size_t nprocs() const { return hartids().size(); } }; diff --git a/riscv/sim.cc b/riscv/sim.cc index 832be7a6..069e1b51 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -28,7 +28,7 @@ static void handle_signal(int sig) signal(sig, &handle_signal); } -sim_t::sim_t(const cfg_t *cfg, bool halted, bool real_time_clint, +sim_t::sim_t(const cfg_t *cfg, bool halted, std::vector> mems, std::vector> plugin_devices, const std::vector& args, @@ -94,7 +94,7 @@ sim_t::sim_t(const cfg_t *cfg, bool halted, bool real_time_clint, // setting the dtb_file argument has one. reg_t clint_base; if (fdt_parse_clint(fdt, &clint_base, "riscv,clint0") == 0) { - clint.reset(new clint_t(procs, CPU_HZ / INSNS_PER_RTC_TICK, real_time_clint)); + clint.reset(new clint_t(procs, CPU_HZ / INSNS_PER_RTC_TICK, cfg->real_time_clint())); bus.add_device(clint_base, clint.get()); } diff --git a/riscv/sim.h b/riscv/sim.h index 4f7a3845..97cada13 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -32,7 +32,7 @@ class remote_bitbang_t; class sim_t : public htif_t, public simif_t { public: - sim_t(const cfg_t *cfg, bool halted, bool real_time_clint, + sim_t(const cfg_t *cfg, bool halted, std::vector> mems, std::vector> plugin_devices, const std::vector& args, diff --git a/spike_main/spike.cc b/spike_main/spike.cc index ab4a6750..55290452 100644 --- a/spike_main/spike.cc +++ b/spike_main/spike.cc @@ -244,7 +244,6 @@ int main(int argc, char** argv) bool socket = false; // command line option -s bool dump_dts = false; bool dtb_enabled = true; - bool real_time_clint = false; const char* kernel = NULL; reg_t kernel_offset, kernel_size; std::vector> plugin_devices; @@ -279,7 +278,8 @@ int main(int argc, char** argv) /*default_priv=*/DEFAULT_PRIV, /*default_varch=*/DEFAULT_VARCH, /*default_mem_layout=*/parse_mem_layout("2048"), - /*default_hartids=*/std::vector()); + /*default_hartids=*/std::vector(), + /*default_real_time_clint=*/false); auto const device_parser = [&plugin_devices](const char *s) { const std::string str(s); @@ -358,7 +358,7 @@ int main(int argc, char** argv) parser.option(0, "kernel", 1, [&](const char* s){kernel = s;}); parser.option(0, "initrd", 1, [&](const char* s){initrd = s;}); parser.option(0, "bootargs", 1, [&](const char* s){cfg.bootargs = s;}); - parser.option(0, "real-time-clint", 0, [&](const char *s){real_time_clint = true;}); + parser.option(0, "real-time-clint", 0, [&](const char *s){cfg.real_time_clint = true;}); parser.option(0, "extlib", 1, [&](const char *s){ void *lib = dlopen(s, RTLD_NOW | RTLD_GLOBAL); if (lib == NULL) { @@ -482,7 +482,7 @@ int main(int argc, char** argv) cfg.hartids = default_hartids; } - sim_t s(&cfg, halted, real_time_clint, + sim_t s(&cfg, halted, mems, plugin_devices, htif_args, dm_config, log_path, dtb_enabled, dtb_file, #ifdef HAVE_BOOST_ASIO io_service_ptr, acceptor_ptr,