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riscv-isa-sim
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Bind disas for instructions with the isa support

pull/912/head
Weiwei Li 4 years ago
parent
d685520fed
commit
a68d310bcb
4 changed files with 1088 additions and 1013 deletions
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  1. 336
      disasm/disasm.cc
  2. 3
      riscv/disasm.h
  3. 2
      riscv/processor.cc
  4. 2
      spike_dasm/spike-dasm.cc

336
disasm/disasm.cc
View File

@ -622,7 +622,7 @@ static void NOINLINE add_unknown_insns(disassembler_t* d)
#undef DECLARE_INSN
}
disassembler_t::disassembler_t(int xlen)
disassembler_t::disassembler_t(isa_parser_t* isa)
{
const uint32_t mask_rd = 0x1fUL << 7;
const uint32_t match_rd_ra = 1UL << 7;
@ -692,6 +692,7 @@ disassembler_t::disassembler_t(int xlen)
DEFINE_XSTORE(sw)
DEFINE_XSTORE(sd)
if (isa->extension_enabled('A')) {
DEFINE_XAMO(amoadd_w)
DEFINE_XAMO(amoswap_w)
DEFINE_XAMO(amoand_w)
@ -710,21 +711,11 @@ disassembler_t::disassembler_t(int xlen)
DEFINE_XAMO(amomax_d)
DEFINE_XAMO(amominu_d)
DEFINE_XAMO(amomaxu_d)
DEFINE_XLOAD_BASE(lr_w)
DEFINE_XAMO(sc_w)
DEFINE_XLOAD_BASE(lr_d)
DEFINE_XAMO(sc_d)
DEFINE_FLOAD(flw)
DEFINE_FLOAD(fld)
DEFINE_FLOAD(flh)
DEFINE_FLOAD(flq)
DEFINE_FSTORE(fsw)
DEFINE_FSTORE(fsd)
DEFINE_FSTORE(fsh)
DEFINE_FSTORE(fsq)
}
add_insn(new disasm_insn_t("j", match_jal, mask_jal | mask_rd, {&jump_target}));
add_insn(new disasm_insn_t("jal", match_jal | match_rd_ra, mask_jal | mask_rd, {&jump_target}));
@ -783,46 +774,76 @@ disassembler_t::disassembler_t(int xlen)
DEFINE_RTYPE(sra);
DEFINE_RTYPE(or);
DEFINE_RTYPE(and);
DEFINE_RTYPE(addw);
DEFINE_RTYPE(subw);
DEFINE_RTYPE(sllw);
DEFINE_RTYPE(srlw);
DEFINE_RTYPE(sraw);
DEFINE_NOARG(ecall);
DEFINE_NOARG(ebreak);
DEFINE_NOARG(mret);
DEFINE_NOARG(dret);
DEFINE_NOARG(wfi);
add_insn(new disasm_insn_t("fence", match_fence, mask_fence, {&iorw}));
DEFINE_NOARG(fence_i);
add_insn(new disasm_insn_t("csrr", match_csrrs, mask_csrrs | mask_rs1, {&xrd, &csr}));
add_insn(new disasm_insn_t("csrw", match_csrrw, mask_csrrw | mask_rd, {&csr, &xrs1}));
add_insn(new disasm_insn_t("csrs", match_csrrs, mask_csrrs | mask_rd, {&csr, &xrs1}));
add_insn(new disasm_insn_t("csrc", match_csrrc, mask_csrrc | mask_rd, {&csr, &xrs1}));
add_insn(new disasm_insn_t("csrwi", match_csrrwi, mask_csrrwi | mask_rd, {&csr, &zimm5}));
add_insn(new disasm_insn_t("csrsi", match_csrrsi, mask_csrrsi | mask_rd, {&csr, &zimm5}));
add_insn(new disasm_insn_t("csrci", match_csrrci, mask_csrrci | mask_rd, {&csr, &zimm5}));
add_insn(new disasm_insn_t("csrrw", match_csrrw, mask_csrrw, {&xrd, &csr, &xrs1}));
add_insn(new disasm_insn_t("csrrs", match_csrrs, mask_csrrs, {&xrd, &csr, &xrs1}));
add_insn(new disasm_insn_t("csrrc", match_csrrc, mask_csrrc, {&xrd, &csr, &xrs1}));
add_insn(new disasm_insn_t("csrrwi", match_csrrwi, mask_csrrwi, {&xrd, &csr, &zimm5}));
add_insn(new disasm_insn_t("csrrsi", match_csrrsi, mask_csrrsi, {&xrd, &csr, &zimm5}));
add_insn(new disasm_insn_t("csrrci", match_csrrci, mask_csrrci, {&xrd, &csr, &zimm5}));
if (isa->extension_enabled('S')) {
DEFINE_NOARG(sret);
DEFINE_SFENCE_TYPE(sfence_vma);
}
if (isa->extension_enabled('M')) {
DEFINE_RTYPE(mul);
DEFINE_RTYPE(mulh);
DEFINE_RTYPE(mulhu);
DEFINE_RTYPE(mulhsu);
DEFINE_RTYPE(mulw);
DEFINE_RTYPE(div);
DEFINE_RTYPE(divu);
DEFINE_RTYPE(rem);
DEFINE_RTYPE(remu);
DEFINE_RTYPE(addw);
DEFINE_RTYPE(subw);
DEFINE_RTYPE(sllw);
DEFINE_RTYPE(srlw);
DEFINE_RTYPE(sraw);
DEFINE_RTYPE(mulw);
DEFINE_RTYPE(divw);
DEFINE_RTYPE(divuw);
DEFINE_RTYPE(remw);
DEFINE_RTYPE(remuw);
}
DEFINE_ITYPE_SHIFT(slli_uw);
add_insn(new disasm_insn_t("zext.w", match_add_uw, mask_add_uw | mask_rs2, {&xrd, &xrs1}));
DEFINE_RTYPE(add_uw);
if (isa->extension_enabled(EXT_ZBA)) {
DEFINE_RTYPE(sh1add);
DEFINE_RTYPE(sh2add);
DEFINE_RTYPE(sh3add);
if (isa->get_max_xlen() == 64) {
DEFINE_ITYPE_SHIFT(slli_uw);
add_insn(new disasm_insn_t("zext.w", match_add_uw, mask_add_uw | mask_rs2, {&xrd, &xrs1}));
DEFINE_RTYPE(add_uw);
DEFINE_RTYPE(sh1add_uw);
DEFINE_RTYPE(sh2add_uw);
DEFINE_RTYPE(sh3add_uw);
}
}
if (isa->extension_enabled(EXT_ZBB)) {
DEFINE_RTYPE(ror);
DEFINE_RTYPE(rorw);
DEFINE_RTYPE(rol);
DEFINE_RTYPE(rolw);
DEFINE_ITYPE_SHIFT(rori);
DEFINE_ITYPE_SHIFT(roriw);
DEFINE_R1TYPE(ctz);
DEFINE_R1TYPE(ctzw);
DEFINE_R1TYPE(clz);
DEFINE_R1TYPE(clzw);
DEFINE_R1TYPE(cpop);
DEFINE_R1TYPE(cpopw);
DEFINE_RTYPE(min);
DEFINE_RTYPE(minu);
DEFINE_RTYPE(max);
@ -832,24 +853,20 @@ disassembler_t::disassembler_t(int xlen)
DEFINE_RTYPE(xnor);
DEFINE_R1TYPE(sext_b);
DEFINE_R1TYPE(sext_h);
add_insn(new disasm_insn_t("zext.h", (xlen == 32 ? match_pack : match_packw), mask_pack | mask_rs2, {&xrd, &xrs1}));
DEFINE_RTYPE(pack);
DEFINE_RTYPE(packu);
DEFINE_RTYPE(packw);
DEFINE_RTYPE(grev);
add_insn(new disasm_insn_t("rev", match_grevi | ((xlen - 1) << imm_shift), mask_grevi | mask_imm, {&xrd, &xrs1}));
add_insn(new disasm_insn_t("rev8", match_grevi | ((xlen - 8) << imm_shift), mask_grevi | mask_imm, {&xrd, &xrs1}));
add_insn(new disasm_insn_t("brev8", match_grevi | (0x7 << imm_shift), mask_grevi | mask_imm, {&xrd, &xrs1})); // brev8
add_insn(new disasm_insn_t("rev8.h", match_grevi | (0x8 << imm_shift), mask_grevi | mask_imm, {&xrd, &xrs1})); // swap16
DEFINE_ITYPE_SHIFT(grevi);
DEFINE_RTYPE(gorc);
add_insn(new disasm_insn_t("rev8", match_grevi | ((isa->get_max_xlen() - 8) << imm_shift), mask_grevi | mask_imm, {&xrd, &xrs1}));
add_insn(new disasm_insn_t("orc.b", match_gorci | (0x7 << imm_shift), mask_grevi | mask_imm, {&xrd, &xrs1}));
DEFINE_ITYPE_SHIFT(gorci);
DEFINE_RTYPE(xperm4);
DEFINE_RTYPE(xperm8);
DEFINE_RTYPE(xperm16);
DEFINE_RTYPE(xperm32);
add_insn(new disasm_insn_t("zext.h", (isa->get_max_xlen() == 32 ? match_pack : match_packw), mask_pack | mask_rs2, {&xrd, &xrs1}));
if (isa->get_max_xlen() == 64) {
DEFINE_RTYPE(rorw);
DEFINE_RTYPE(rolw);
DEFINE_ITYPE_SHIFT(roriw);
DEFINE_R1TYPE(ctzw);
DEFINE_R1TYPE(clzw);
DEFINE_R1TYPE(cpopw);
}
}
if (isa->extension_enabled(EXT_ZBS)) {
DEFINE_RTYPE(bclr);
DEFINE_RTYPE(binv);
DEFINE_RTYPE(bset);
@ -858,42 +875,29 @@ disassembler_t::disassembler_t(int xlen)
DEFINE_ITYPE_SHIFT(binvi);
DEFINE_ITYPE_SHIFT(bseti);
DEFINE_ITYPE_SHIFT(bexti);
}
DEFINE_R3TYPE(cmix);
DEFINE_R3TYPE(fsr);
DEFINE_R3TYPE(fsri);
DEFINE_R3TYPE(fsriw);
DEFINE_R3TYPE(fsrw);
if (isa->extension_enabled(EXT_ZBKB)) {
add_insn(new disasm_insn_t("brev8", match_grevi | (0x7 << imm_shift), mask_grevi | mask_imm, {&xrd, &xrs1})); // brev8
add_insn(new disasm_insn_t("rev8", match_grevi | ((isa->get_max_xlen() - 8) << imm_shift), mask_grevi | mask_imm, {&xrd, &xrs1}));
DEFINE_RTYPE(pack);
DEFINE_RTYPE(packh);
if (isa->get_max_xlen() == 64) {
DEFINE_RTYPE(packw);
}
}
DEFINE_NOARG(ecall);
DEFINE_NOARG(ebreak);
DEFINE_NOARG(sret);
DEFINE_NOARG(mret);
DEFINE_NOARG(dret);
DEFINE_NOARG(wfi);
add_insn(new disasm_insn_t("fence", match_fence, mask_fence, {&iorw}));
DEFINE_NOARG(fence_i);
DEFINE_SFENCE_TYPE(sfence_vma);
if (isa->extension_enabled(EXT_SVINVAL)) {
DEFINE_NOARG(sfence_w_inval);
DEFINE_NOARG(sfence_inval_ir);
DEFINE_SFENCE_TYPE(sinval_vma);
DEFINE_SFENCE_TYPE(hinval_vvma);
DEFINE_SFENCE_TYPE(hinval_gvma);
}
add_insn(new disasm_insn_t("csrr", match_csrrs, mask_csrrs | mask_rs1, {&xrd, &csr}));
add_insn(new disasm_insn_t("csrw", match_csrrw, mask_csrrw | mask_rd, {&csr, &xrs1}));
add_insn(new disasm_insn_t("csrs", match_csrrs, mask_csrrs | mask_rd, {&csr, &xrs1}));
add_insn(new disasm_insn_t("csrc", match_csrrc, mask_csrrc | mask_rd, {&csr, &xrs1}));
add_insn(new disasm_insn_t("csrwi", match_csrrwi, mask_csrrwi | mask_rd, {&csr, &zimm5}));
add_insn(new disasm_insn_t("csrsi", match_csrrsi, mask_csrrsi | mask_rd, {&csr, &zimm5}));
add_insn(new disasm_insn_t("csrci", match_csrrci, mask_csrrci | mask_rd, {&csr, &zimm5}));
add_insn(new disasm_insn_t("csrrw", match_csrrw, mask_csrrw, {&xrd, &csr, &xrs1}));
add_insn(new disasm_insn_t("csrrs", match_csrrs, mask_csrrs, {&xrd, &csr, &xrs1}));
add_insn(new disasm_insn_t("csrrc", match_csrrc, mask_csrrc, {&xrd, &csr, &xrs1}));
add_insn(new disasm_insn_t("csrrwi", match_csrrwi, mask_csrrwi, {&xrd, &csr, &zimm5}));
add_insn(new disasm_insn_t("csrrsi", match_csrrsi, mask_csrrsi, {&xrd, &csr, &zimm5}));
add_insn(new disasm_insn_t("csrrci", match_csrrci, mask_csrrci, {&xrd, &csr, &zimm5}));
if (isa->extension_enabled('F')) {
DEFINE_FLOAD(flw)
DEFINE_FSTORE(fsw)
DEFINE_FRTYPE(fadd_s);
DEFINE_FRTYPE(fsub_s);
DEFINE_FRTYPE(fmul_s);
@ -925,7 +929,11 @@ disassembler_t::disassembler_t(int xlen)
DEFINE_FX2TYPE(feq_s);
DEFINE_FX2TYPE(flt_s);
DEFINE_FX2TYPE(fle_s);
}
if (isa->extension_enabled('D')) {
DEFINE_FLOAD(fld)
DEFINE_FSTORE(fsd)
DEFINE_FRTYPE(fadd_d);
DEFINE_FRTYPE(fsub_d);
DEFINE_FRTYPE(fmul_d);
@ -957,7 +965,9 @@ disassembler_t::disassembler_t(int xlen)
DEFINE_FX2TYPE(feq_d);
DEFINE_FX2TYPE(flt_d);
DEFINE_FX2TYPE(fle_d);
}
if (isa->extension_enabled(EXT_ZFH)) {
DEFINE_FRTYPE(fadd_h);
DEFINE_FRTYPE(fsub_h);
DEFINE_FRTYPE(fmul_h);
@ -972,28 +982,37 @@ disassembler_t::disassembler_t(int xlen)
DEFINE_FRTYPE(fsgnj_h);
DEFINE_FRTYPE(fsgnjn_h);
DEFINE_FRTYPE(fsgnjx_h);
DEFINE_FR1TYPE(fcvt_h_s);
DEFINE_FR1TYPE(fcvt_h_d);
DEFINE_FR1TYPE(fcvt_h_q);
DEFINE_FR1TYPE(fcvt_s_h);
DEFINE_FR1TYPE(fcvt_d_h);
DEFINE_FR1TYPE(fcvt_q_h);
DEFINE_XFTYPE(fcvt_h_l);
DEFINE_XFTYPE(fcvt_h_lu);
DEFINE_XFTYPE(fcvt_h_w);
DEFINE_XFTYPE(fcvt_h_wu);
DEFINE_XFTYPE(fcvt_h_wu);
DEFINE_XFTYPE(fmv_h_x);
DEFINE_FXTYPE(fcvt_l_h);
DEFINE_FXTYPE(fcvt_lu_h);
DEFINE_FXTYPE(fcvt_w_h);
DEFINE_FXTYPE(fcvt_wu_h);
DEFINE_FXTYPE(fclass_h);
DEFINE_FXTYPE(fmv_x_h);
DEFINE_FX2TYPE(feq_h);
DEFINE_FX2TYPE(flt_h);
DEFINE_FX2TYPE(fle_h);
}
if (isa->extension_enabled(EXT_ZFHMIN)) {
DEFINE_FLOAD(flh)
DEFINE_FSTORE(fsh)
DEFINE_FR1TYPE(fcvt_h_s);
DEFINE_FR1TYPE(fcvt_h_d);
DEFINE_FR1TYPE(fcvt_h_q);
DEFINE_FR1TYPE(fcvt_s_h);
DEFINE_FR1TYPE(fcvt_d_h);
DEFINE_FR1TYPE(fcvt_q_h);
DEFINE_XFTYPE(fmv_h_x);
DEFINE_FXTYPE(fmv_x_h);
}
if (isa->extension_enabled('Q')) {
DEFINE_FLOAD(flq)
DEFINE_FSTORE(fsq)
DEFINE_FRTYPE(fadd_q);
DEFINE_FRTYPE(fsub_q);
DEFINE_FRTYPE(fmul_q);
@ -1023,9 +1042,10 @@ disassembler_t::disassembler_t(int xlen)
DEFINE_FX2TYPE(feq_q);
DEFINE_FX2TYPE(flt_q);
DEFINE_FX2TYPE(fle_q);
}
// ext-h
if (isa->extension_enabled('H')) {
DEFINE_XLOAD_BASE(hlv_b)
DEFINE_XLOAD_BASE(hlv_bu)
DEFINE_XLOAD_BASE(hlv_h)
@ -1044,9 +1064,10 @@ disassembler_t::disassembler_t(int xlen)
DEFINE_SFENCE_TYPE(hfence_gvma);
DEFINE_SFENCE_TYPE(hfence_vvma);
}
// ext-c
if (isa->extension_enabled('C')) {
DISASM_INSN("c.ebreak", c_add, mask_rd | mask_rvc_rs2, {});
add_insn(new disasm_insn_t("ret", match_c_jr | match_rd_ra, mask_c_jr | mask_rd | mask_rvc_imm, {}));
DISASM_INSN("c.jr", c_jr, mask_rvc_imm, {&rvc_rs1});
@ -1080,7 +1101,22 @@ disassembler_t::disassembler_t(int xlen)
DISASM_INSN("c.fldsp", c_fldsp, 0, {&frd, &rvc_ldsp_address});
DISASM_INSN("c.fsd", c_fsd, 0, {&rvc_fp_rs2s, &rvc_ld_address});
DISASM_INSN("c.fsdsp", c_fsdsp, 0, {&rvc_fp_rs2, &rvc_sdsp_address});
if (isa->get_max_xlen() == 32) {
DISASM_INSN("c.flw", c_flw, 0, {&rvc_fp_rs2s, &rvc_lw_address});
DISASM_INSN("c.flwsp", c_flwsp, 0, {&frd, &rvc_lwsp_address});
DISASM_INSN("c.fsw", c_fsw, 0, {&rvc_fp_rs2s, &rvc_lw_address});
DISASM_INSN("c.fswsp", c_fswsp, 0, {&rvc_fp_rs2, &rvc_swsp_address});
DISASM_INSN("c.jal", c_jal, 0, {&rvc_jump_target});
} else {
DISASM_INSN("c.ld", c_ld, 0, {&rvc_rs2s, &rvc_ld_address});
DISASM_INSN("c.ldsp", c_ldsp, 0, {&xrd, &rvc_ldsp_address});
DISASM_INSN("c.sd", c_sd, 0, {&rvc_rs2s, &rvc_ld_address});
DISASM_INSN("c.sdsp", c_sdsp, 0, {&rvc_rs2, &rvc_sdsp_address});
DISASM_INSN("c.addiw", c_addiw, 0, {&xrd, &rvc_imm});
}
}
if (isa->extension_enabled('V')) {
DISASM_INSN("vsetivli", vsetivli, 0, {&xrd, &zimm5, &v_vtype});
DISASM_INSN("vsetvli", vsetvli, 0, {&xrd, &xrs1, &v_vtype});
DEFINE_RTYPE(vsetvl);
@ -1438,7 +1474,6 @@ disassembler_t::disassembler_t(int xlen)
//vfunary0
DISASM_VFUNARY0_INSN(vf, v);
DISASM_VFUNARY0_INSN(vfw, v);
DEFINE_VECTOR_V(vfwcvt_f_f_v);
@ -1516,6 +1551,7 @@ disassembler_t::disassembler_t(int xlen)
}
}
}
}
#define DEFINE_PI3TYPE(code) add_pitype3_insn(this, #code, match_##code, mask_##code);
#define DEFINE_PI4TYPE(code) add_pitype4_insn(this, #code, match_##code, mask_##code);
@ -1542,6 +1578,68 @@ disassembler_t::disassembler_t(int xlen)
DEFINE_RTYPE(code); \
DEFINE_RTYPE(code##_u); \
if (isa->extension_enabled(EXT_ZMMUL)) {
DEFINE_RTYPE(mul);
DEFINE_RTYPE(mulh);
DEFINE_RTYPE(mulhu);
DEFINE_RTYPE(mulhsu);
DEFINE_RTYPE(mulw);
}
if (isa->extension_enabled(EXT_ZBPBO)) {
DEFINE_RTYPE(min);
DEFINE_RTYPE(max);
DEFINE_R3TYPE(cmix);
DEFINE_RTYPE(pack);
DEFINE_RTYPE(packu);
add_insn(new disasm_insn_t("rev", match_grevi | ((isa->get_max_xlen() - 1) << imm_shift), mask_grevi | mask_imm, {&xrd, &xrs1}));
add_insn(new disasm_insn_t("rev8.h", match_grevi | (0x8 << imm_shift), mask_grevi | mask_imm, {&xrd, &xrs1})); // swap16
if (isa->get_max_xlen() == 32) {
DEFINE_R1TYPE(clz);
DEFINE_R3TYPE(fsr);
DEFINE_R3TYPE(fsri);
} else {
DEFINE_R3TYPE(fsrw);
}
}
if (isa->extension_enabled(EXT_ZPSFOPERAND)) {
DEFINE_RTYPE(smal)
DEFINE_RTYPE(radd64);
DEFINE_RTYPE(uradd64);
DEFINE_RTYPE(kadd64);
DEFINE_RTYPE(ukadd64);
DEFINE_RTYPE(rsub64);
DEFINE_RTYPE(ursub64);
DEFINE_RTYPE(ksub64);
DEFINE_RTYPE(uksub64);
DEFINE_RTYPE(smar64);
DEFINE_RTYPE(smsr64);
DEFINE_RTYPE(umar64);
DEFINE_RTYPE(umsr64);
DEFINE_RTYPE(kmar64);
DEFINE_RTYPE(kmsr64);
DEFINE_RTYPE(ukmar64);
DEFINE_RTYPE(ukmsr64);
DEFINE_RTYPE(smalbb);
DEFINE_RTYPE(smalbt);
DEFINE_RTYPE(smaltt);
DEFINE_RTYPE(smalda);
DEFINE_RTYPE(smalxda);
DEFINE_RTYPE(smalds);
DEFINE_RTYPE(smaldrs);
DEFINE_RTYPE(smalxds);
DEFINE_RTYPE(smslda);
DEFINE_RTYPE(smslxda);
DEFINE_RTYPE(mulr64);
DEFINE_RTYPE(mulsr64);
if (isa->get_max_xlen() == 32) {
DEFINE_RTYPE(add64);
DEFINE_RTYPE(sub64);
}
}
if (isa->extension_enabled(EXT_ZPN)) {
DISASM_8_AND_16_RINSN(add);
DISASM_8_AND_16_RINSN(radd);
DISASM_8_AND_16_RINSN(uradd);
@ -1572,7 +1670,6 @@ disassembler_t::disassembler_t(int xlen)
DEFINE_RTYPE(urstsa16);
DEFINE_RTYPE(kstsa16);
DEFINE_RTYPE(ukstsa16);
DISASM_8_AND_16_RINSN(sra);
DISASM_8_AND_16_RINSN(srl);
DISASM_8_AND_16_RINSN(sll);
@ -1659,7 +1756,6 @@ disassembler_t::disassembler_t(int xlen)
DEFINE_RTYPE(kmaxds)
DEFINE_RTYPE(kmsda)
DEFINE_RTYPE(kmsxda)
DEFINE_RTYPE(smal)
DEFINE_RTYPE(sclip32)
DEFINE_RTYPE(uclip32)
DEFINE_R1TYPE(clrs32);
@ -1670,33 +1766,6 @@ disassembler_t::disassembler_t(int xlen)
DEFINE_RTYPE(umaqa);
DEFINE_RTYPE(smaqa_su);
DEFINE_RTYPE(radd64);
DEFINE_RTYPE(uradd64);
DEFINE_RTYPE(kadd64);
DEFINE_RTYPE(ukadd64);
DEFINE_RTYPE(rsub64);
DEFINE_RTYPE(ursub64);
DEFINE_RTYPE(ksub64);
DEFINE_RTYPE(uksub64);
DEFINE_RTYPE(smar64);
DEFINE_RTYPE(smsr64);
DEFINE_RTYPE(umar64);
DEFINE_RTYPE(umsr64);
DEFINE_RTYPE(kmar64);
DEFINE_RTYPE(kmsr64);
DEFINE_RTYPE(ukmar64);
DEFINE_RTYPE(ukmsr64);
DEFINE_RTYPE(smalbb);
DEFINE_RTYPE(smalbt);
DEFINE_RTYPE(smaltt);
DEFINE_RTYPE(smalda);
DEFINE_RTYPE(smalxda);
DEFINE_RTYPE(smalds);
DEFINE_RTYPE(smaldrs);
DEFINE_RTYPE(smalxds);
DEFINE_RTYPE(smslda);
DEFINE_RTYPE(smslxda);
DEFINE_RTYPE(kaddh);
DEFINE_RTYPE(ksubh);
DEFINE_RTYPE(khmbb);
@ -1723,10 +1792,6 @@ disassembler_t::disassembler_t(int xlen)
DEFINE_RTYPE(uraddw);
DEFINE_RTYPE(rsubw);
DEFINE_RTYPE(ursubw);
DEFINE_RTYPE(max);
DEFINE_RTYPE(min);
DEFINE_RTYPE(mulr64);
DEFINE_RTYPE(mulsr64);
DEFINE_RTYPE(msubr32);
DEFINE_RTYPE(ave);
DEFINE_RTYPE(sra_u);
@ -1734,22 +1799,7 @@ disassembler_t::disassembler_t(int xlen)
DEFINE_PI3TYPE(insb);
DEFINE_RTYPE(maddr32)
if (xlen == 32) {
DISASM_INSN("c.flw", c_flw, 0, {&rvc_fp_rs2s, &rvc_lw_address});
DISASM_INSN("c.flwsp", c_flwsp, 0, {&frd, &rvc_lwsp_address});
DISASM_INSN("c.fsw", c_fsw, 0, {&rvc_fp_rs2s, &rvc_lw_address});
DISASM_INSN("c.fswsp", c_fswsp, 0, {&rvc_fp_rs2, &rvc_swsp_address});
DISASM_INSN("c.jal", c_jal, 0, {&rvc_jump_target});
DEFINE_RTYPE(add64);
DEFINE_RTYPE(sub64);
} else {
DISASM_INSN("c.ld", c_ld, 0, {&rvc_rs2s, &rvc_ld_address});
DISASM_INSN("c.ldsp", c_ldsp, 0, {&xrd, &rvc_ldsp_address});
DISASM_INSN("c.sd", c_sd, 0, {&rvc_rs2s, &rvc_ld_address});
DISASM_INSN("c.sdsp", c_sdsp, 0, {&rvc_rs2, &rvc_sdsp_address});
DISASM_INSN("c.addiw", c_addiw, 0, {&xrd, &rvc_imm});
if (isa->get_max_xlen() == 64) {
DEFINE_RTYPE(add32);
DEFINE_RTYPE(radd32);
DEFINE_RTYPE(uradd32);
@ -1830,6 +1880,30 @@ disassembler_t::disassembler_t(int xlen)
DEFINE_RTYPE(pktb32);
DEFINE_RTYPE(pktt32);
}
}
if (isa->extension_enabled(EXT_XBITMANIP)) {
DEFINE_ITYPE_SHIFT(grevi);
DEFINE_ITYPE_SHIFT(gorci);
DEFINE_RTYPE(pack);
DEFINE_RTYPE(packh);
DEFINE_RTYPE(packu);
DEFINE_RTYPE(grev);
DEFINE_RTYPE(gorc);
DEFINE_RTYPE(xperm4);
DEFINE_RTYPE(xperm8);
DEFINE_RTYPE(xperm16);
DEFINE_RTYPE(xperm32);
DEFINE_R3TYPE(cmix);
DEFINE_R3TYPE(fsr);
DEFINE_R3TYPE(fsri);
if(isa->get_max_xlen() == 64) {
DEFINE_RTYPE(packw);
DEFINE_R3TYPE(fsriw);
DEFINE_R3TYPE(fsrw);
}
}
add_unknown_insns(this);
}

3
riscv/disasm.h
View File

@ -4,6 +4,7 @@
#define _RISCV_DISASM_H
#include "decode.h"
#include "processor.h"
#include <string>
#include <sstream>
#include <algorithm>
@ -80,7 +81,7 @@ class disasm_insn_t
class disassembler_t
{
public:
disassembler_t(int xlen);
disassembler_t(isa_parser_t* isa);
~disassembler_t();
std::string disassemble(insn_t insn) const;

2
riscv/processor.cc
View File

@ -39,7 +39,7 @@ processor_t::processor_t(const char* isa, const char* priv, const char* varch,
register_base_instructions();
mmu = new mmu_t(sim, this);
disassembler = new disassembler_t(max_xlen);
disassembler = new disassembler_t(this);
for (auto e : custom_extensions)
register_extension(e.second);

2
spike_dasm/spike-dasm.cc
View File

@ -28,7 +28,7 @@ int main(int argc, char** argv)
parser.parse(argv);
isa_parser_t isa_parser(isa);
disassembler_t* disassembler = new disassembler_t(isa_parser.get_max_xlen());
disassembler_t* disassembler = new disassembler_t(&isa_parser);
if (extension) {
for (auto disasm_insn : extension()->get_disasms()) {
disassembler->add_insn(disasm_insn);

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