From a498c47a73aff56345d45844fe637c6edfdfdb11 Mon Sep 17 00:00:00 2001 From: Chih-Min Chao Date: Sun, 20 Feb 2022 22:42:52 -0800 Subject: [PATCH] csr: mstatus.sxl and mstatus.uxl are zero in rv32 dont' set mstatus.sxl and mstatus.uxl in rv32 mode Signed-off-by: Chih-Min Chao --- riscv/csrs.cc | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/riscv/csrs.cc b/riscv/csrs.cc index d2d30526..44fd9598 100644 --- a/riscv/csrs.cc +++ b/riscv/csrs.cc @@ -418,8 +418,9 @@ bool sstatus_proxy_csr_t::unlogged_write(const reg_t val) noexcept { mstatus_csr_t::mstatus_csr_t(processor_t* const proc, const reg_t addr): base_status_csr_t(proc, addr), val(0 - | (proc->extension_enabled_const('U') ? set_field((reg_t)0, MSTATUS_UXL, xlen_to_uxl(proc->get_const_xlen())) : 0) - | (proc->extension_enabled_const('S') ? set_field((reg_t)0, MSTATUS_SXL, xlen_to_uxl(proc->get_const_xlen())) : 0) + | (proc->extension_enabled_const('U') && (proc->get_const_xlen() != 32) ? set_field((reg_t)0, MSTATUS_UXL, xlen_to_uxl(proc->get_const_xlen())) : 0) + | (proc->extension_enabled_const('S') && (proc->get_const_xlen() != 32) ? set_field((reg_t)0, MSTATUS_SXL, xlen_to_uxl(proc->get_const_xlen())) : 0) + #ifdef RISCV_ENABLE_DUAL_ENDIAN | (proc->get_mmu()->is_target_big_endian() ? MSTATUS_UBE | MSTATUS_SBE | MSTATUS_MBE : 0) #endif