From a09b88d4abb8fe3015c3921c7468e78b7f09da15 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Wed, 19 Oct 2022 17:28:37 -0700 Subject: [PATCH] Remove require_alignment flag from loads The last remaining use was LR, which we can identify through other means. --- riscv/mmu.cc | 4 ++-- riscv/mmu.h | 10 +++++----- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/riscv/mmu.cc b/riscv/mmu.cc index 0c858aea..3f9b5e9d 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -199,7 +199,7 @@ void mmu_t::load_slow_path_intrapage(reg_t addr, reg_t len, uint8_t* bytes, uint } } -void mmu_t::load_slow_path(reg_t addr, reg_t len, uint8_t* bytes, uint32_t xlate_flags, bool UNUSED require_alignment) +void mmu_t::load_slow_path(reg_t addr, reg_t len, uint8_t* bytes, uint32_t xlate_flags) { check_triggers(triggers::OPERATION_LOAD, addr); @@ -210,7 +210,7 @@ void mmu_t::load_slow_path(reg_t addr, reg_t len, uint8_t* bytes, uint32_t xlate #ifndef RISCV_ENABLE_MISALIGNED throw trap_load_address_misaligned(gva, addr, 0, 0); #else - if (require_alignment) + if (xlate_flags & RISCV_XLATE_LR) throw trap_load_access_fault(gva, addr, 0, 0); reg_t len_page0 = std::min(len, PGSIZE - addr % PGSIZE); diff --git a/riscv/mmu.h b/riscv/mmu.h index bbe473bb..4d9e1e17 100644 --- a/riscv/mmu.h +++ b/riscv/mmu.h @@ -61,7 +61,7 @@ public: #endif template - T ALWAYS_INLINE load(reg_t addr, bool require_alignment = false, uint32_t xlate_flags = 0) { + T ALWAYS_INLINE load(reg_t addr, uint32_t xlate_flags = 0) { target_endian res; reg_t vpn = addr >> PGSHIFT; bool aligned = (addr & (sizeof(T) - 1)) == 0; @@ -70,7 +70,7 @@ public: if (likely(xlate_flags == 0 && aligned && tlb_hit)) { res = *(target_endian*)(tlb_data[vpn % TLB_ENTRIES].host_offset + addr); } else { - load_slow_path(addr, sizeof(T), (uint8_t*)&res, xlate_flags, require_alignment); + load_slow_path(addr, sizeof(T), (uint8_t*)&res, xlate_flags); } if (proc) @@ -81,12 +81,12 @@ public: template T load_reserved(reg_t addr) { - return load(addr, true, RISCV_XLATE_LR); + return load(addr, RISCV_XLATE_LR); } // template for functions that load an aligned value from memory #define load_func(type, prefix, xlate_flags) \ - type##_t ALWAYS_INLINE prefix##_##type(reg_t addr, bool require_alignment = false) { return load(addr, require_alignment, xlate_flags); } + type##_t ALWAYS_INLINE prefix##_##type(reg_t addr) { return load(addr, xlate_flags); } // load value from memory at aligned address; zero extend to register width load_func(uint8, load, 0) @@ -384,7 +384,7 @@ private: // handle uncommon cases: TLB misses, page faults, MMIO tlb_entry_t fetch_slow_path(reg_t addr); - void load_slow_path(reg_t addr, reg_t len, uint8_t* bytes, uint32_t xlate_flags, bool require_alignment); + void load_slow_path(reg_t addr, reg_t len, uint8_t* bytes, uint32_t xlate_flags); void load_slow_path_intrapage(reg_t addr, reg_t len, uint8_t* bytes, uint32_t xlate_flags); void store_slow_path(reg_t addr, reg_t len, const uint8_t* bytes, uint32_t xlate_flags, bool actually_store, bool require_alignment); void store_slow_path_intrapage(reg_t addr, reg_t len, const uint8_t* bytes, uint32_t xlate_flags, bool actually_store);