AIA: Add mtopi CSR

All bytes of the machine-level iprio array are read-only 0s, and
mtopi.IPRIO is always 1 whenever mtopi is not 0.

riscv/csr_init.cc

@@ -474,4 +474,8 @@ void state_t::csr_init(processor_t* const proc, reg_t max_isa)
 
   const reg_t srmcfg_mask = SRMCFG_MCID | SRMCFG_RCID;
   add_const_ext_csr(EXT_SSQOSID, CSR_SRMCFG, std::make_shared<srmcfg_csr_t>(proc, CSR_SRMCFG, srmcfg_mask, 0));
+
+  if (proc->extension_enabled_const(EXT_SMAIA)) {
+    add_csr(CSR_MTOPI, std::make_shared<mtopi_csr_t>(proc, CSR_MTOPI));
+  }
 }

riscv/csrs.cc

@@ -15,6 +15,8 @@
 #include "insn_macros.h"
 // For CSR_DCSR_V:
 #include "debug_defines.h"
+// For ctz:
+#include "arith.h"
 
 // STATE macro used by require_privilege() macro:
 #undef STATE
@@ -1973,3 +1975,21 @@ bool scntinhibit_csr_t::unlogged_write(const reg_t val) noexcept {
 reg_t scntinhibit_csr_t::read() const noexcept {
   return state->mcounteren->read() & state->mcountinhibit->read();
 }
+
+mtopi_csr_t::mtopi_csr_t(processor_t* const proc, const reg_t addr):
+  csr_t(proc, addr) {
+}
+
+reg_t mtopi_csr_t::read() const noexcept {
+  reg_t enabled_interrupts = state->mip->read() & state->mie->read() & ~state->mideleg->read();
+  if (!enabled_interrupts)
+    return 0; // no enabled pending interrupt to M-mode
+
+  reg_t selected_interrupt = proc->select_an_interrupt_with_default_priority(enabled_interrupts);
+  reg_t identity = ctz(selected_interrupt);
+  return set_field((reg_t)1, MTOPI_IID, identity); // IPRIO always 1 if iprio array is RO0
+}
+
+bool mtopi_csr_t::unlogged_write(const reg_t UNUSED val) noexcept {
+  return false;
+}

riscv/csrs.h

@@ -909,4 +909,11 @@ class scntinhibit_csr_t: public basic_csr_t {
   virtual bool unlogged_write(const reg_t val) noexcept override;
 };
 
+class mtopi_csr_t: public csr_t {
+ public:
+  mtopi_csr_t(processor_t* const proc, const reg_t addr);
+  virtual reg_t read() const noexcept override;
+ protected:
+  bool unlogged_write(const reg_t val) noexcept override;
+};
 #endif