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@ -592,12 +592,16 @@ class register_read_op_t : public operation_t |
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switch (step) { |
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case 0: |
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if (reg >= REG_XPR0 && reg <= REG_XPR31) { |
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unsigned int i = 0; |
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if (reg == S0) { |
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gs.dr_write32(i++, csrr(S0, CSR_DSCRATCH)); |
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} |
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if (gs.xlen == 32) { |
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gs.dr_write32(0, sw(reg - REG_XPR0, 0, (uint16_t) DEBUG_RAM_START + 16)); |
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gs.dr_write32(i++, sw(reg - REG_XPR0, 0, (uint16_t) DEBUG_RAM_START + 16)); |
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} else { |
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gs.dr_write32(0, sd(reg - REG_XPR0, 0, (uint16_t) DEBUG_RAM_START + 16)); |
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gs.dr_write32(i++, sd(reg - REG_XPR0, 0, (uint16_t) DEBUG_RAM_START + 16)); |
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} |
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gs.dr_write_jump(1); |
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gs.dr_write_jump(i); |
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} else if (reg == REG_PC) { |
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gs.start_packet(); |
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if (gs.xlen == 32) { |
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