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The Svadu (https://github.com/riscv/riscv-svadu) extension updates the A/D bits of PTEs: 1. In S/HS mode when menvcfg.hade=1 2. In G-stage page tables when menvcfg.hade=1 3. In VS mode when henvcfg.hade=1 To enable this behavior the 'svadu' ISA string is needed. This newly added behavior supplants the --mmu-dirty flag. However, that flag is not yet removed.pull/1240/head
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