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rvp: do sext32 before writing to rd for rv32 

Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
pull/2310/head
Chih-Min Chao 3 months ago
parent
72a5c14248
commit
8b1ad63088
26 changed files with 43 additions and 37 deletions
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  1. 2
      riscv/insns/aadd.h
  2. 2
      riscv/insns/aaddu.h
  3. 2
      riscv/insns/asub.h
  4. 2
      riscv/insns/asubu.h
  5. 2
      riscv/insns/mqacc_h00.h
  6. 2
      riscv/insns/mqacc_h01.h
  7. 2
      riscv/insns/mqacc_h11.h
  8. 2
      riscv/insns/mqracc_h00.h
  9. 2
      riscv/insns/mqracc_h01.h
  10. 2
      riscv/insns/mqracc_h11.h
  11. 2
      riscv/insns/mulh_h0.h
  12. 2
      riscv/insns/mulh_h1.h
  13. 2
      riscv/insns/mulhsu_h0.h
  14. 2
      riscv/insns/mulhsu_h1.h
  15. 2
      riscv/insns/mulq.h
  16. 2
      riscv/insns/mulqr.h
  17. 2
      riscv/insns/nsra.h
  18. 2
      riscv/insns/nsrai.h
  19. 6
      riscv/insns/nsrar.h
  20. 6
      riscv/insns/nsrari.h
  21. 2
      riscv/insns/nsrl.h
  22. 2
      riscv/insns/nsrli.h
  23. 2
      riscv/insns/sadd.h
  24. 5
      riscv/insns/saddu.h
  25. 2
      riscv/insns/ssh1sadd.h
  26. 19
      riscv/insns/ssha.h

2
riscv/insns/aadd.h
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@ -1,3 +1,3 @@
require_extension('P');
require_rv32;
WRITE_RD((RS1 + RS2)>>1);
WRITE_RD(sext32((RS1 + RS2)>>1));

2
riscv/insns/aaddu.h
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@ -1,3 +1,3 @@
require_extension('P');
require_rv32;
WRITE_RD((0ULL + (uint32_t)RS1 + (uint32_t)RS2)>>1);
WRITE_RD(sext32((0ULL + (uint32_t)RS1 + (uint32_t)RS2)>>1));

2
riscv/insns/asub.h
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@ -1,3 +1,3 @@
require_extension('P');
require_rv32;
WRITE_RD((RS1 - RS2)>>1);
WRITE_RD(sext32((RS1 - RS2)>>1));

2
riscv/insns/asubu.h
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@ -1,3 +1,3 @@
require_extension('P');
require_rv32;
WRITE_RD((0ULL + (uint32_t)RS1 - (uint32_t)RS2)>>1);
WRITE_RD((sext32(0ULL + (uint32_t)RS1 - (uint32_t)RS2)>>1));

2
riscv/insns/mqacc_h00.h
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@ -1,3 +1,3 @@
require_extension('P');
require_rv32;
WRITE_RD(RD + (((int32_t)P_FIELD(RS1, 0, 16) * P_FIELD(RS2, 0, 16)) >> 15));
WRITE_RD(sext32(RD + (((int32_t)P_FIELD(RS1, 0, 16) * P_FIELD(RS2, 0, 16)) >> 15)));

2
riscv/insns/mqacc_h01.h
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@ -1,3 +1,3 @@
require_extension('P');
require_rv32;
WRITE_RD(RD + (((int32_t)P_FIELD(RS1, 0, 16) * P_FIELD(RS2, 1, 16)) >> 15));
WRITE_RD(sext32(RD + (((int32_t)P_FIELD(RS1, 0, 16) * P_FIELD(RS2, 1, 16)) >> 15)));

2
riscv/insns/mqacc_h11.h
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@ -1,3 +1,3 @@
require_extension('P');
require_rv32;
WRITE_RD(RD + (((int32_t)P_FIELD(RS1, 1, 16) * P_FIELD(RS2, 1, 16)) >> 15));
WRITE_RD(sext32(RD + (((int32_t)P_FIELD(RS1, 1, 16) * P_FIELD(RS2, 1, 16)) >> 15)));

2
riscv/insns/mqracc_h00.h
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@ -1,3 +1,3 @@
require_extension('P');
require_rv32;
WRITE_RD(RD + (((int32_t)P_FIELD(RS1, 0, 16) * P_FIELD(RS2, 0, 16) + 0x4000) >> 15));
WRITE_RD(sext32(RD + (((int32_t)P_FIELD(RS1, 0, 16) * P_FIELD(RS2, 0, 16) + 0x4000) >> 15)));

2
riscv/insns/mqracc_h01.h
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@ -1,3 +1,3 @@
require_extension('P');
require_rv32;
WRITE_RD(RD + (((int32_t)P_FIELD(RS1, 0, 16) * P_FIELD(RS2, 1, 16) + 0x4000) >> 15));
WRITE_RD(sext32(RD + (((int32_t)P_FIELD(RS1, 0, 16) * P_FIELD(RS2, 1, 16) + 0x4000) >> 15)));

2
riscv/insns/mqracc_h11.h
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@ -1,3 +1,3 @@
require_extension('P');
require_rv32;
WRITE_RD(RD + (((int32_t)P_FIELD(RS1, 1, 16) * P_FIELD(RS2, 1, 16) + 0x4000) >> 15));
WRITE_RD(sext32(RD + (((int32_t)P_FIELD(RS1, 1, 16) * P_FIELD(RS2, 1, 16) + 0x4000) >> 15)));

2
riscv/insns/mulh_h0.h
View File

@ -1,4 +1,4 @@
require_extension('P');
require_rv32;
int64_t mres = sext(RS1,64) * sext(P_FIELD(RS2, 0, 16),64);
WRITE_RD(mres>>32);
WRITE_RD(sext32(mres>>16));

2
riscv/insns/mulh_h1.h
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@ -1,4 +1,4 @@
require_extension('P');
require_rv32;
int64_t mres = sext(RS1,64) * sext(P_FIELD(RS2, 1, 16),64);
WRITE_RD(mres>>32);
WRITE_RD(sext32(mres>>16));

2
riscv/insns/mulhsu_h0.h
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@ -1,4 +1,4 @@
require_extension('P');
require_rv32;
sreg_t mres = sext32(RS1) * (uint32_t)P_FIELD(RS2, 0, 16);
WRITE_RD(mres >> 32);
WRITE_RD(sext32(mres >> 16));

2
riscv/insns/mulhsu_h1.h
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@ -1,4 +1,4 @@
require_extension('P');
require_rv32;
sreg_t mres = sext32(RS1) * (uint32_t)P_FIELD(RS2, 1, 16);
WRITE_RD(mres >> 32);
WRITE_RD(sext32(mres >> 16));

2
riscv/insns/mulq.h
View File

@ -1,7 +1,7 @@
require_extension('P');
require_rv32;
if ((RS1 != (reg_t)INT32_MIN) || (RS2 != (reg_t)INT32_MIN)) {
WRITE_RD((RS1 * RS2) >> 31);
WRITE_RD(sext32((RS1 * RS2) >> 31));
} else {
WRITE_RD(INT32_MAX);
P.set_vxsat();

2
riscv/insns/mulqr.h
View File

@ -1,7 +1,7 @@
require_extension('P');
require_rv32;
if ((RS1 != (reg_t)INT32_MIN) || (RS2 != (reg_t)INT32_MIN)) {
WRITE_RD((((RS1 * RS2) >> 30) + 1) >> 1);
WRITE_RD(sext32((((RS1 * RS2) >> 30) + 1) >> 1));
} else {
WRITE_RD(INT32_MAX);
P.set_vxsat();

2
riscv/insns/nsra.h
View File

@ -1,3 +1,3 @@
require_extension('P');
require_rv32;
WRITE_RD((sreg_t)P_RS1_PAIR >> (RS2 & 0x3f));
WRITE_RD(sext32((sreg_t)P_RS1_PAIR >> (RS2 & 0x3f)));

2
riscv/insns/nsrai.h
View File

@ -1,3 +1,3 @@
require_extension('P');
require_rv32;
WRITE_RD((sreg_t)P_RS1_PAIR >> insn.shamtd());
WRITE_RD(sext32((sreg_t)P_RS1_PAIR >> insn.shamtd()));

6
riscv/insns/nsrar.h
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@ -4,8 +4,8 @@ sreg_t val = (sreg_t)P_RS1_PAIR;
uint32_t shamt = RS2 & 0x3f;
sreg_t result;
if (shamt == 0) {
result = val;
result = val;
} else {
result = (val >> shamt) + ((val >> (shamt - 1)) & 1);
result = (val >> shamt) + ((val >> (shamt - 1)) & 1);
}
WRITE_RD(result);
WRITE_RD(sext32(result));

6
riscv/insns/nsrari.h
View File

@ -4,8 +4,8 @@ sreg_t val = (sreg_t)P_RS1_PAIR;
uint32_t shamt = insn.shamtd();
sreg_t result;
if (shamt == 0) {
result = val;
result = val;
} else {
result = (val >> shamt) + ((val >> (shamt - 1)) & 1);
result = (val >> shamt) + ((val >> (shamt - 1)) & 1);
}
WRITE_RD(result);
WRITE_RD(sext32(result));

2
riscv/insns/nsrl.h
View File

@ -1,3 +1,3 @@
require_extension('P');
require_rv32;
WRITE_RD(P_RS1_PAIR >> (RS2 & 0x3f));
WRITE_RD(sext32(P_RS1_PAIR >> (RS2 & 0x3f)));

2
riscv/insns/nsrli.h
View File

@ -1,3 +1,3 @@
require_extension('P');
require_rv32;
WRITE_RD(P_RS1_PAIR >> insn.shamtd());
WRITE_RD(sext32(P_RS1_PAIR >> insn.shamtd()));

2
riscv/insns/sadd.h
View File

@ -1,3 +1,3 @@
require_extension('P');
require_rv32;
WRITE_RD(P_SAT(xlen, sext_xlen((RS1 << 1) + RS2)));
WRITE_RD(sext32(P_SAT(xlen, (RS1 + RS2))));

5
riscv/insns/saddu.h
View File

@ -1,4 +1,7 @@
require_extension('P');
require_rv32;
bool sat = false;
WRITE_RD(sat_addu<uint32_t>(RS1, RS2, sat));
reg_t tmp = sat_addu<uint32_t>(RS1, RS2, sat);
if (sat)
P.set_vxsat();
WRITE_RD(sext32(tmp));

2
riscv/insns/ssh1sadd.h
View File

@ -1,3 +1,3 @@
require_extension('P');
require_rv32;
WRITE_RD(P_SAT(xlen, sext_xlen((RS1 << 1) + RS2)));
WRITE_RD(sext32(P_SAT(xlen, ((RS1 << 1) + RS2))));

19
riscv/insns/ssha.h
View File

@ -1,13 +1,16 @@
require_extension('P');
require_rv32;
sreg_t sshamt = P_FIELD(RS2, 0, 8);
if (RS1 == 0)
WRITE_RD(0);
else if (sshamt >= 32) {
WRITE_RD((RS1 & 0x80000000) ? 0x80000000 : 0x7fffffff);
sreg_t val;
if (RS1 == 0) {
val = 0;
} else if (sshamt >= 32) {
val = (RS1 & 0x80000000) ? 0x80000000 : 0x7fffffff;
P.set_vxsat();
} else if (sshamt <= -32) {
val = (RS1 & 0x80000000) ? 0xffffffff : 0;
} else {
val = sshamt >= 0 ? P_SAT(32, static_cast<sreg_t> (RS1) << sshamt) : (RS1 >> -sshamt);
}
else if (sshamt <= -32)
WRITE_RD((RS1 & 0x80000000) ? 0xffffffff : 0);
else
WRITE_RD(sshamt >= 0 ? P_SAT(32, static_cast<sreg_t> (RS1) << sshamt) : (RS1 >> -sshamt));
WRITE_RD(sext32(val));

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