diff --git a/riscv/decode.h b/riscv/decode.h
index e5e81155..9f13a42d 100644
--- a/riscv/decode.h
+++ b/riscv/decode.h
@@ -316,7 +316,6 @@ class wait_for_interrupt_t {};
 
 #define wfi() \
   do { set_pc_and_serialize(npc); \
-       npc = PC_SERIALIZE_WFI; \
        throw wait_for_interrupt_t(); \
      } while (0)
 
@@ -325,7 +324,6 @@ class wait_for_interrupt_t {};
 /* Sentinel PC values to serialize simulator pipeline */
 #define PC_SERIALIZE_BEFORE 3
 #define PC_SERIALIZE_AFTER 5
-#define PC_SERIALIZE_WFI 7
 #define invalid_pc(pc) ((pc) & 1)
 
 /* Convenience wrappers to simplify softfloat code sequences */
diff --git a/riscv/execute.cc b/riscv/execute.cc
index ea4dc5be..7cb16dd8 100644
--- a/riscv/execute.cc
+++ b/riscv/execute.cc
@@ -242,7 +242,6 @@ void processor_t::step(size_t n)
        switch (pc) { \
          case PC_SERIALIZE_BEFORE: state.serialized = true; break; \
          case PC_SERIALIZE_AFTER: ++instret; break; \
-         case PC_SERIALIZE_WFI: n = ++instret; break; \
          default: abort(); \
        } \
        pc = state.pc; \