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Simplify single-width averaging add and subtract (#867)

pull/869/head
Yueh-Ting (Eop) Chen 5 years ago
committed by GitHub
parent
commit
7cc6c0a0d7
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  1. 104
      riscv/decode.h
  2. 2
      riscv/insns/vaadd_vv.h
  3. 2
      riscv/insns/vaadd_vx.h
  4. 2
      riscv/insns/vaaddu_vv.h
  5. 2
      riscv/insns/vaaddu_vx.h
  6. 2
      riscv/insns/vasub_vv.h
  7. 2
      riscv/insns/vasub_vx.h
  8. 2
      riscv/insns/vasubu_vv.h
  9. 2
      riscv/insns/vasubu_vx.h

104
riscv/decode.h

@ -1427,85 +1427,37 @@ VI_LOOP_END
VI_LOOP_END
// average loop
#define VI_VVX_LOOP_AVG(opd, op, is_vs1) \
VI_CHECK_SSS(is_vs1); \
#define VI_VV_LOOP_AVG(op) \
VRM xrm = p->VU.get_vround_mode(); \
VI_LOOP_BASE \
switch(sew) { \
case e8: { \
VV_PARAMS(e8); \
type_sew_t<e8>::type rs1 = RS1; \
auto res = (int32_t)vs2 op opd; \
INT_ROUNDING(res, xrm, 1); \
vd = res >> 1; \
break; \
} \
case e16: { \
VV_PARAMS(e16); \
type_sew_t<e16>::type rs1 = RS1; \
auto res = (int32_t)vs2 op opd; \
INT_ROUNDING(res, xrm, 1); \
vd = res >> 1; \
break; \
} \
case e32: { \
VV_PARAMS(e32); \
type_sew_t<e32>::type rs1 = RS1; \
auto res = (int64_t)vs2 op opd; \
INT_ROUNDING(res, xrm, 1); \
vd = res >> 1; \
break; \
} \
default: { \
VV_PARAMS(e64); \
type_sew_t<e64>::type rs1 = RS1; \
auto res = (int128_t)vs2 op opd; \
INT_ROUNDING(res, xrm, 1); \
vd = res >> 1; \
break; \
} \
} \
VI_LOOP_END
VI_VV_LOOP({ \
uint128_t res = ((uint128_t)vs2) op vs1; \
INT_ROUNDING(res, xrm, 1); \
vd = res >> 1; \
})
#define VI_VVX_ULOOP_AVG(opd, op, is_vs1) \
VI_CHECK_SSS(is_vs1); \
#define VI_VX_LOOP_AVG(op) \
VRM xrm = p->VU.get_vround_mode(); \
VI_LOOP_BASE \
switch(sew) { \
case e8: { \
VV_U_PARAMS(e8); \
type_usew_t<e8>::type rs1 = RS1; \
auto res = (uint16_t)vs2 op opd; \
INT_ROUNDING(res, xrm, 1); \
vd = res >> 1; \
break; \
} \
case e16: { \
VV_U_PARAMS(e16); \
type_usew_t<e16>::type rs1 = RS1; \
auto res = (uint32_t)vs2 op opd; \
INT_ROUNDING(res, xrm, 1); \
vd = res >> 1; \
break; \
} \
case e32: { \
VV_U_PARAMS(e32); \
type_usew_t<e32>::type rs1 = RS1; \
auto res = (uint64_t)vs2 op opd; \
INT_ROUNDING(res, xrm, 1); \
vd = res >> 1; \
break; \
} \
default: { \
VV_U_PARAMS(e64); \
type_usew_t<e64>::type rs1 = RS1; \
auto res = (uint128_t)vs2 op opd; \
INT_ROUNDING(res, xrm, 1); \
vd = res >> 1; \
break; \
} \
} \
VI_LOOP_END
VI_VX_LOOP({ \
uint128_t res = ((uint128_t)vs2) op rs1; \
INT_ROUNDING(res, xrm, 1); \
vd = res >> 1; \
})
#define VI_VV_ULOOP_AVG(op) \
VRM xrm = p->VU.get_vround_mode(); \
VI_VV_ULOOP({ \
uint128_t res = ((uint128_t)vs2) op vs1; \
INT_ROUNDING(res, xrm, 1); \
vd = res >> 1; \
})
#define VI_VX_ULOOP_AVG(op) \
VRM xrm = p->VU.get_vround_mode(); \
VI_VX_ULOOP({ \
uint128_t res = ((uint128_t)vs2) op rs1; \
INT_ROUNDING(res, xrm, 1); \
vd = res >> 1; \
})
//
// vector: load/store helper

2
riscv/insns/vaadd_vv.h

@ -1,2 +1,2 @@
// vaadd.vv vd, vs2, vs1
VI_VVX_LOOP_AVG(vs1, +, true);
VI_VV_LOOP_AVG(+);

2
riscv/insns/vaadd_vx.h

@ -1,2 +1,2 @@
// vaadd.vx vd, vs2, rs1
VI_VVX_LOOP_AVG(rs1, +, false);
VI_VX_LOOP_AVG(+);

2
riscv/insns/vaaddu_vv.h

@ -1,2 +1,2 @@
// vaaddu.vv vd, vs2, vs1
VI_VVX_ULOOP_AVG(vs1, +, true);
VI_VV_ULOOP_AVG(+);

2
riscv/insns/vaaddu_vx.h

@ -1,2 +1,2 @@
// vaaddu.vx vd, vs2, rs1
VI_VVX_ULOOP_AVG(rs1, +, false);
VI_VX_ULOOP_AVG(+);

2
riscv/insns/vasub_vv.h

@ -1,2 +1,2 @@
// vasub.vv vd, vs2, vs1
VI_VVX_LOOP_AVG(vs1, -, true);
VI_VV_LOOP_AVG(-);

2
riscv/insns/vasub_vx.h

@ -1,2 +1,2 @@
// vasub.vx vd, vs2, rs1
VI_VVX_LOOP_AVG(rs1, -, false);
VI_VX_LOOP_AVG(-);

2
riscv/insns/vasubu_vv.h

@ -1,2 +1,2 @@
// vasubu.vv vd, vs2, vs1
VI_VVX_ULOOP_AVG(vs1, -, true);
VI_VV_ULOOP_AVG(-);

2
riscv/insns/vasubu_vx.h

@ -1,2 +1,2 @@
// vasubu.vx vd, vs2, rs1
VI_VVX_ULOOP_AVG(rs1, -, false);
VI_VX_ULOOP_AVG(-);

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