rvp: add packed instructions for rv64 - part1

Add the following categories

  * RD-only element-wise instructions (_w suffix
  * packed add/sub instructions (_w suffix only)
  * packed cross instructions (_wx suffix only)
  * packed accumulation instructions (_ws suffix
  * packed sign-extend and saturating instructions
  * packed shift instructions (_w/_ws suffix and
  * packed compare instructions (_w suffix only)
  * packed pack instructions (_h/_w suffix only)
  * rev_rv32/rev/rev16

riscv/insns/paadd_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_LOOP(32,32,32, {
+  p_rd = ((int64_t)p_rs1 + p_rs2) >> 1;
+}
+)

riscv/insns/paaddu_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_ULOOP(32,32,32, {
+  p_rd = ((uint64_t)p_rs1 + p_rs2) >> 1;
+}
+)

riscv/insns/paas_wx.h

@@ -0,0 +1,7 @@
+require_rv64;
+P_CROSS_LOOP(32, {
+  p_rd = ((int64_t)p_rs1 + p_rs2) >> 1;
+}, {
+  p_rd = ((int64_t)p_rs1 - p_rs2) >> 1;
+}
+)

riscv/insns/padd_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_LOOP(32, 32, 32, {
+  p_rd = p_rs1 + p_rs2;
+}
+)

riscv/insns/padd_ws.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_LOOP(32, 32, {
+  p_rd = p_rs1 + P_FIELD(RS2, 0, 32);
+}
+)

riscv/insns/pas_wx.h

@@ -0,0 +1,7 @@
+require_rv64;
+P_CROSS_LOOP(32, {
+  p_rd = p_rs1 + p_rs2;
+}, {
+  p_rd = p_rs1 - p_rs2;
+}
+)

riscv/insns/pasa_wx.h

@@ -0,0 +1,7 @@
+require_rv64;
+P_CROSS_LOOP(32, {
+  p_rd = ((uint64_t)p_rs1 - p_rs2) >> 1;
+}, {
+  p_rd = ((uint64_t)p_rs1 + p_rs2) >> 1;
+}
+)

riscv/insns/pasub_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_LOOP(32,32,32, {
+  p_rd = ((int64_t)p_rs1 - p_rs2) >> 1;
+}
+)

riscv/insns/pasubu_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_ULOOP(32,32,32, {
+  p_rd = ((uint64_t)p_rs1 - p_rs2) >> 1;
+}
+)

riscv/insns/pli_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_LOOP(32, {
+  p_rd = (insn.p_imm10csl() & 0x200) ? (0xfffffc00 | insn.p_imm10csl()) : insn.p_imm10csl();
+}
+)

riscv/insns/plui_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_LOOP(32, {
+  p_rd = insn.p_imm10csrw();
+}
+)

riscv/insns/pmax_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_LOOP(32,32,32, {
+  p_rd = (p_rs1 > p_rs2) ? p_rs1 : p_rs2;
+}
+)

riscv/insns/pmaxu_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_ULOOP(32,32,32, {
+  p_rd = (p_rs1 > p_rs2) ? p_rs1 : p_rs2;
+}
+)

riscv/insns/pmin_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_LOOP(32,32,32, {
+  p_rd = (p_rs1 < p_rs2) ? p_rs1 : p_rs2;
+}
+)

riscv/insns/pminu_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_ULOOP(32,32,32, {
+  p_rd = (p_rs1 < p_rs2) ? p_rs1 : p_rs2;
+}
+)

riscv/insns/pmseq_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_LOOP(32,32,32, {
+  p_rd = (p_rs1 == p_rs2) ? -1 : 0;
+}
+)

riscv/insns/pmslt_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_LOOP(32,32,32, {
+  p_rd = (p_rs1 < p_rs2) ? -1 : 0;
+}
+)

riscv/insns/pmsltu_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_ULOOP(32,32,32, {
+  p_rd = (p_rs1 < p_rs2) ? -1 : 0;
+}
+)

riscv/insns/ppaire_h.h

@@ -0,0 +1 @@
+P_PACK(16, 0, 0);

riscv/insns/ppaireo_w.h

@@ -0,0 +1,2 @@
+require_rv64;
+P_PACK(32, 0, 1);

riscv/insns/ppairo_w.h

@@ -0,0 +1,2 @@
+require_rv64;
+P_PACK(32, 1, 1);

riscv/insns/ppairoe_w.h

@@ -0,0 +1,2 @@
+require_rv64;
+P_PACK(32, 1, 0);

riscv/insns/predsum_ws.h

@@ -0,0 +1,6 @@
+require_rv64;
+reg_t rd_tmp = RS2; \
+P_RS1_LOOP_BASE(32)
+  P_RS1_PARAMS(32)
+  rd_tmp += sext_xlen(p_rs1);
+P_RD_LOOP_END()

riscv/insns/predsumu_ws.h

@@ -0,0 +1,6 @@
+require_rv64;
+reg_t rd_tmp = RS2; \
+P_RS1_LOOP_BASE(32)
+  P_RS1_UPARAMS(32)
+  rd_tmp += zext_xlen(p_rs1);
+P_RD_LOOP_END()

riscv/insns/psa_wx.h

@@ -0,0 +1,7 @@
+require_rv64;
+P_CROSS_LOOP(32, {
+  p_rd = p_rs1 - p_rs2;
+}, {
+  p_rd = p_rs1 + p_rs2;
+}
+)

riscv/insns/psadd_w.h

@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_LOOP(32,32,32, {
+  bool sat = false;
+  p_rd = (sat_add<int32_t, uint32_t>(p_rs1, p_rs2, sat));
+}
+)

riscv/insns/psaddu_w.h

@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_ULOOP(32,32,32, {
+  bool sat = false;
+  p_rd = (sat_addu<uint32_t>(p_rs1, p_rs2, sat));
+}
+)

riscv/insns/psas_wx.h

@@ -0,0 +1,9 @@
+require_rv64;
+P_CROSS_ULOOP(32, {
+  bool sat = false;
+  p_rd = (sat_add<int32_t, uint32_t>(p_rs1, p_rs2, sat));
+}, {
+  bool sat = false;
+  p_rd = (sat_sub<int32_t, uint32_t>(p_rs1, p_rs2, sat));
+}
+)

riscv/insns/psati_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_LOOP(32, 32, {
+  p_rd = P_SAT(insn.shamtw() + 1, p_rs1);
+}
+)

riscv/insns/psext_w_b.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_LOOP(32, 32, {
+  p_rd = (int32_t)(int8_t)p_rs1;
+}
+)

riscv/insns/psext_w_h.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_LOOP(32, 32, {
+  p_rd = (int32_t)(int16_t)p_rs1;
+}
+)

riscv/insns/psh1add_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_LOOP(32, 32, 32, {
+  p_rd = (p_rs1 << 1) + p_rs2;
+}
+)

riscv/insns/psll_ws.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_LOOP(32, 32, {
+  p_rd = p_rs1 << (RS2 & (32 - 1));
+}
+)

riscv/insns/pslli_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_LOOP(32, 32, {
+  p_rd = p_rs1 << insn.shamtw();
+}
+)

riscv/insns/psra_ws.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_LOOP(32, 32, {
+  p_rd = p_rs1 >> (RS2 & (32 - 1));
+}
+)

riscv/insns/psrai_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_LOOP(32, 32, {
+  p_rd = p_rs1 >> insn.shamtw();
+}
+)

riscv/insns/psrari_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_LOOP(32, 32, {
+  p_rd = insn.shamtw() ? ((p_rs1 >> insn.shamtw()) + ((p_rs1 >> (insn.shamtw() - 1)) & 1)) : p_rs1;
+}
+)

riscv/insns/psrl_ws.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_ULOOP(32, 32, {
+  p_rd = p_rs1 >> (RS2 & (32 - 1));
+}
+)

riscv/insns/psrli_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_ULOOP(32, 32, {
+  p_rd = p_rs1 >> insn.shamtw();
+}
+)

riscv/insns/pssa_wx.h

@@ -0,0 +1,9 @@
+require_rv64;
+P_CROSS_ULOOP(32, {
+  bool sat = false;
+  p_rd = (sat_sub<int32_t, uint32_t>(p_rs1, p_rs2, sat));
+}, {
+  bool sat = false;
+  p_rd = (sat_add<int32_t, uint32_t>(p_rs1, p_rs2, sat));
+}
+)

riscv/insns/pssh1sadd_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_LOOP(32, 32, 32, {
+  p_rd = P_SAT(32, P_SAT(32, p_rs1 << 1) + p_rs2);
+}
+)

riscv/insns/pssha_ws.h

@@ -0,0 +1,13 @@
+require_rv64;
+sreg_t sshamt = P_FIELD(RS2, 0, 8);
+P_RD_RS1_LOOP(32, 32, {
+  if (p_rs1 == 0)
+    p_rd = 0;
+  else if (sshamt >= 32)
+    p_rd = (p_rs1 & 0x80000000) ? 0x80000000 : 0x7fffffff;
+  else if (sshamt <= -32)
+    p_rd = (p_rs1 & 0x80000000) ? 0xffffffff : 0;
+  else
+    p_rd = sshamt >= 0 ? P_SAT(32, sext32(p_rs1) << sshamt) : (p_rs1 >> -sshamt);
+}
+)

riscv/insns/psshar_ws.h

@@ -0,0 +1,13 @@
+require_rv64;
+sreg_t sshamt = P_FIELD(RS2, 0, 8);
+P_RD_RS1_LOOP(32, 32, {
+  if (p_rs1 == 0)
+    p_rd = 0;
+  else if (sshamt >= 32)
+    p_rd = (p_rs1 & 0x80000000) ? 0x80000000 : 0x7fffffff;
+  else if (sshamt <= -32)
+    p_rd = 0;
+  else
+    p_rd = sshamt >= 0 ? P_SAT(32, sext32(p_rs1) << sshamt) : ((p_rs1 >> -sshamt) + ((p_rs1 >> (-sshamt - 1)) & 1));
+}
+)

riscv/insns/psslai_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_LOOP(32, 32, {
+  p_rd = P_SAT(32, sext32(p_rs1) << insn.shamtw());
+}
+)

riscv/insns/pssub_w.h

@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_LOOP(32,32,32, {
+  bool sat = false;
+  p_rd = (sat_sub<int32_t, uint32_t>(p_rs1, p_rs2, sat));
+}
+)

riscv/insns/pssubu_w.h

@@ -0,0 +1,6 @@
+require_rv64;
+P_RD_RS1_RS2_ULOOP(32,32,32, {
+  bool sat = false;
+  p_rd = (sat_subu<uint32_t>(p_rs1, p_rs2, sat));
+}
+)

riscv/insns/psub_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_RS2_LOOP(32, 32, 32, {
+  p_rd = p_rs1 - p_rs2;
+}
+)

riscv/insns/pusati_w.h

@@ -0,0 +1,5 @@
+require_rv64;
+P_RD_RS1_LOOP(32, 32, {
+  p_rd = P_USAT(insn.shamtw() + 1, p_rs1);
+}
+)

riscv/insns/rev.h

@@ -0,0 +1,3 @@
+require_extension('P');
+
+#include "grevi.h"

riscv/insns/rev16.h

@@ -0,0 +1,4 @@
+require_rv64;
+require_extension('P');
+
+#include "grevi.h"

riscv/insns/rev_rv32.h

@@ -0,0 +1,3 @@
+require_extension('P');
+
+#include "grevi.h"

riscv/insns/sha.h

@@ -0,0 +1,11 @@
+require_extension('P');
+require_rv64;
+sreg_t sshamt = P_FIELD(RS2, 0, 8);
+if (RS1 == 0)
+  WRITE_RD(0);
+else if (sshamt >= 64)
+  WRITE_RD(0);
+else if (sshamt <= -64)
+  WRITE_RD((RS1 & 0x8000000000000000) ? 0xffffffffffffffff : 0);
+else
+  WRITE_RD(sshamt >= 0 ? (RS1 << sshamt) : ((sreg_t)RS1 >> -sshamt));

riscv/insns/shar.h

@@ -0,0 +1,11 @@
+require_extension('P');
+require_rv64;
+sreg_t sshamt = P_FIELD(RS2, 0, 8);
+if (RS1 == 0)
+  WRITE_RD(0);
+else if (sshamt >= 64)
+  WRITE_RD(0);
+else if (sshamt <= -64)
+  WRITE_RD(0);
+else
+  WRITE_RD(sshamt >= 0 ? (RS1 << sshamt) : (((sreg_t)RS1 >> -sshamt) + ((RS1 >> (-sshamt - 1)) & 1)));

riscv/overlap_list.h

@@ -32,3 +32,23 @@ DECLARE_OVERLAP_INSN(sspopchk_x5, EXT_ZICFISS)
 DECLARE_OVERLAP_INSN(c_sspush_x1, EXT_ZICFISS)
 DECLARE_OVERLAP_INSN(c_sspopchk_x5, EXT_ZICFISS)
 DECLARE_OVERLAP_INSN(c_mop_N, EXT_ZCMOP)
+
+// rv64p overlap rv32p
+DECLARE_OVERLAP_INSN(paadd_w, 'P')
+DECLARE_OVERLAP_INSN(paaddu_w, 'P')
+DECLARE_OVERLAP_INSN(pasub_w, 'P')
+DECLARE_OVERLAP_INSN(pasubu_w, 'P')
+DECLARE_OVERLAP_INSN(psadd_w, 'P')
+DECLARE_OVERLAP_INSN(psaddu_w, 'P')
+DECLARE_OVERLAP_INSN(pssh1sadd_w, 'P')
+DECLARE_OVERLAP_INSN(pssub_w, 'P')
+DECLARE_OVERLAP_INSN(pssubu_w, 'P')
+DECLARE_OVERLAP_INSN(psati_w, 'P')
+DECLARE_OVERLAP_INSN(pusati_w, 'P')
+DECLARE_OVERLAP_INSN(psrari_w, 'P')
+DECLARE_OVERLAP_INSN(pssha_ws, 'P')
+DECLARE_OVERLAP_INSN(psshar_ws, 'P')
+DECLARE_OVERLAP_INSN(psslai_w, 'P')
+DECLARE_OVERLAP_INSN(pmseq_w, 'P')
+DECLARE_OVERLAP_INSN(pmslt_w, 'P')
+DECLARE_OVERLAP_INSN(pmsltu_w, 'P')

riscv/riscv.mk.in

@@ -1587,6 +1587,59 @@ riscv_insn_ext_p = \
 	pm2wsuba_h \
 	pm2wsub_hx \
 	pm2wsuba_hx \
+	pli_w \
+	plui_w \
+	paadd_w \
+	paaddu_w \
+	padd_w \
+	padd_ws \
+	pasub_w \
+	pasubu_w \
+	psadd_w \
+	psaddu_w \
+	psh1add_w \
+	pssh1sadd_w \
+	pssub_w \
+	pssubu_w \
+	psub_w \
+	paas_wx \
+	pas_wx \
+	pasa_wx \
+	psa_wx \
+	psas_wx \
+	pssa_wx \
+	predsum_ws \
+	predsumu_ws \
+	psati_w \
+	psext_w_b \
+	psext_w_h \
+	pusati_w \
+	psll_ws \
+	pslli_w \
+	psra_ws \
+	psrai_w \
+	psrari_w \
+	psrl_ws \
+	psrli_w \
+	pssha_ws \
+	psshar_ws \
+	psslai_w \
+	sha \
+	shar \
+	pmax_w \
+	pmaxu_w \
+	pmin_w \
+	pminu_w \
+	pmseq_w \
+	pmslt_w \
+	pmsltu_w \
+	ppaire_h \
+	ppaireo_w \
+	ppairo_w \
+	ppairoe_w \
+	rev \
+	rev16 \
+	rev_rv32 \
 
 riscv_insn_list = \
 	$(riscv_insn_ext_i) \