From 71b7473b5fbd54189cab5f1e2ab8c70cb8c46c47 Mon Sep 17 00:00:00 2001 From: Jason Date: Wed, 28 Jan 2026 07:11:40 -0800 Subject: [PATCH] rvp: add packed instructions for rv64 - part1 Add the following categories * RD-only element-wise instructions (_w suffix * packed add/sub instructions (_w suffix only) * packed cross instructions (_wx suffix only) * packed accumulation instructions (_ws suffix * packed sign-extend and saturating instructions * packed shift instructions (_w/_ws suffix and * packed compare instructions (_w suffix only) * packed pack instructions (_h/_w suffix only) * rev_rv32/rev/rev16 --- riscv/insns/paadd_w.h | 5 ++++ riscv/insns/paaddu_w.h | 5 ++++ riscv/insns/paas_wx.h | 7 ++++++ riscv/insns/padd_w.h | 5 ++++ riscv/insns/padd_ws.h | 5 ++++ riscv/insns/pas_wx.h | 7 ++++++ riscv/insns/pasa_wx.h | 7 ++++++ riscv/insns/pasub_w.h | 5 ++++ riscv/insns/pasubu_w.h | 5 ++++ riscv/insns/pli_w.h | 5 ++++ riscv/insns/plui_w.h | 5 ++++ riscv/insns/pmax_w.h | 5 ++++ riscv/insns/pmaxu_w.h | 5 ++++ riscv/insns/pmin_w.h | 5 ++++ riscv/insns/pminu_w.h | 5 ++++ riscv/insns/pmseq_w.h | 5 ++++ riscv/insns/pmslt_w.h | 5 ++++ riscv/insns/pmsltu_w.h | 5 ++++ riscv/insns/ppaire_h.h | 1 + riscv/insns/ppaireo_w.h | 2 ++ riscv/insns/ppairo_w.h | 2 ++ riscv/insns/ppairoe_w.h | 2 ++ riscv/insns/predsum_ws.h | 6 +++++ riscv/insns/predsumu_ws.h | 6 +++++ riscv/insns/psa_wx.h | 7 ++++++ riscv/insns/psadd_w.h | 6 +++++ riscv/insns/psaddu_w.h | 6 +++++ riscv/insns/psas_wx.h | 9 +++++++ riscv/insns/psati_w.h | 5 ++++ riscv/insns/psext_w_b.h | 5 ++++ riscv/insns/psext_w_h.h | 5 ++++ riscv/insns/psh1add_w.h | 5 ++++ riscv/insns/psll_ws.h | 5 ++++ riscv/insns/pslli_w.h | 5 ++++ riscv/insns/psra_ws.h | 5 ++++ riscv/insns/psrai_w.h | 5 ++++ riscv/insns/psrari_w.h | 5 ++++ riscv/insns/psrl_ws.h | 5 ++++ riscv/insns/psrli_w.h | 5 ++++ riscv/insns/pssa_wx.h | 9 +++++++ riscv/insns/pssh1sadd_w.h | 5 ++++ riscv/insns/pssha_ws.h | 13 ++++++++++ riscv/insns/psshar_ws.h | 13 ++++++++++ riscv/insns/psslai_w.h | 5 ++++ riscv/insns/pssub_w.h | 6 +++++ riscv/insns/pssubu_w.h | 6 +++++ riscv/insns/psub_w.h | 5 ++++ riscv/insns/pusati_w.h | 5 ++++ riscv/insns/rev.h | 3 +++ riscv/insns/rev16.h | 4 +++ riscv/insns/rev_rv32.h | 3 +++ riscv/insns/sha.h | 11 ++++++++ riscv/insns/shar.h | 11 ++++++++ riscv/overlap_list.h | 20 +++++++++++++++ riscv/riscv.mk.in | 53 +++++++++++++++++++++++++++++++++++++++ 55 files changed, 370 insertions(+) create mode 100644 riscv/insns/paadd_w.h create mode 100644 riscv/insns/paaddu_w.h create mode 100644 riscv/insns/paas_wx.h create mode 100644 riscv/insns/padd_w.h create mode 100644 riscv/insns/padd_ws.h create mode 100644 riscv/insns/pas_wx.h create mode 100644 riscv/insns/pasa_wx.h create mode 100644 riscv/insns/pasub_w.h create mode 100644 riscv/insns/pasubu_w.h create mode 100644 riscv/insns/pli_w.h create mode 100644 riscv/insns/plui_w.h create mode 100644 riscv/insns/pmax_w.h create mode 100644 riscv/insns/pmaxu_w.h create mode 100644 riscv/insns/pmin_w.h create mode 100644 riscv/insns/pminu_w.h create mode 100644 riscv/insns/pmseq_w.h create mode 100644 riscv/insns/pmslt_w.h create mode 100644 riscv/insns/pmsltu_w.h create mode 100644 riscv/insns/ppaire_h.h create mode 100644 riscv/insns/ppaireo_w.h create mode 100644 riscv/insns/ppairo_w.h create mode 100644 riscv/insns/ppairoe_w.h create mode 100644 riscv/insns/predsum_ws.h create mode 100644 riscv/insns/predsumu_ws.h create mode 100644 riscv/insns/psa_wx.h create mode 100644 riscv/insns/psadd_w.h create mode 100644 riscv/insns/psaddu_w.h create mode 100644 riscv/insns/psas_wx.h create mode 100644 riscv/insns/psati_w.h create mode 100644 riscv/insns/psext_w_b.h create mode 100644 riscv/insns/psext_w_h.h create mode 100644 riscv/insns/psh1add_w.h create mode 100644 riscv/insns/psll_ws.h create mode 100644 riscv/insns/pslli_w.h create mode 100644 riscv/insns/psra_ws.h create mode 100644 riscv/insns/psrai_w.h create mode 100644 riscv/insns/psrari_w.h create mode 100644 riscv/insns/psrl_ws.h create mode 100644 riscv/insns/psrli_w.h create mode 100644 riscv/insns/pssa_wx.h create mode 100644 riscv/insns/pssh1sadd_w.h create mode 100644 riscv/insns/pssha_ws.h create mode 100644 riscv/insns/psshar_ws.h create mode 100644 riscv/insns/psslai_w.h create mode 100644 riscv/insns/pssub_w.h create mode 100644 riscv/insns/pssubu_w.h create mode 100644 riscv/insns/psub_w.h create mode 100644 riscv/insns/pusati_w.h create mode 100644 riscv/insns/rev.h create mode 100644 riscv/insns/rev16.h create mode 100644 riscv/insns/rev_rv32.h create mode 100644 riscv/insns/sha.h create mode 100644 riscv/insns/shar.h diff --git a/riscv/insns/paadd_w.h b/riscv/insns/paadd_w.h new file mode 100644 index 00000000..6dd9811f --- /dev/null +++ b/riscv/insns/paadd_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + p_rd = ((int64_t)p_rs1 + p_rs2) >> 1; +} +) diff --git a/riscv/insns/paaddu_w.h b/riscv/insns/paaddu_w.h new file mode 100644 index 00000000..fee391c7 --- /dev/null +++ b/riscv/insns/paaddu_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_ULOOP(32,32,32, { + p_rd = ((uint64_t)p_rs1 + p_rs2) >> 1; +} +) diff --git a/riscv/insns/paas_wx.h b/riscv/insns/paas_wx.h new file mode 100644 index 00000000..64565491 --- /dev/null +++ b/riscv/insns/paas_wx.h @@ -0,0 +1,7 @@ +require_rv64; +P_CROSS_LOOP(32, { + p_rd = ((int64_t)p_rs1 + p_rs2) >> 1; +}, { + p_rd = ((int64_t)p_rs1 - p_rs2) >> 1; +} +) diff --git a/riscv/insns/padd_w.h b/riscv/insns/padd_w.h new file mode 100644 index 00000000..9049c7c2 --- /dev/null +++ b/riscv/insns/padd_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32, 32, 32, { + p_rd = p_rs1 + p_rs2; +} +) diff --git a/riscv/insns/padd_ws.h b/riscv/insns/padd_ws.h new file mode 100644 index 00000000..a3fc8b12 --- /dev/null +++ b/riscv/insns/padd_ws.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = p_rs1 + P_FIELD(RS2, 0, 32); +} +) diff --git a/riscv/insns/pas_wx.h b/riscv/insns/pas_wx.h new file mode 100644 index 00000000..b1d6394d --- /dev/null +++ b/riscv/insns/pas_wx.h @@ -0,0 +1,7 @@ +require_rv64; +P_CROSS_LOOP(32, { + p_rd = p_rs1 + p_rs2; +}, { + p_rd = p_rs1 - p_rs2; +} +) diff --git a/riscv/insns/pasa_wx.h b/riscv/insns/pasa_wx.h new file mode 100644 index 00000000..1ddcd3b0 --- /dev/null +++ b/riscv/insns/pasa_wx.h @@ -0,0 +1,7 @@ +require_rv64; +P_CROSS_LOOP(32, { + p_rd = ((uint64_t)p_rs1 - p_rs2) >> 1; +}, { + p_rd = ((uint64_t)p_rs1 + p_rs2) >> 1; +} +) diff --git a/riscv/insns/pasub_w.h b/riscv/insns/pasub_w.h new file mode 100644 index 00000000..55c24439 --- /dev/null +++ b/riscv/insns/pasub_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + p_rd = ((int64_t)p_rs1 - p_rs2) >> 1; +} +) diff --git a/riscv/insns/pasubu_w.h b/riscv/insns/pasubu_w.h new file mode 100644 index 00000000..39d4693f --- /dev/null +++ b/riscv/insns/pasubu_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_ULOOP(32,32,32, { + p_rd = ((uint64_t)p_rs1 - p_rs2) >> 1; +} +) diff --git a/riscv/insns/pli_w.h b/riscv/insns/pli_w.h new file mode 100644 index 00000000..22a69c81 --- /dev/null +++ b/riscv/insns/pli_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_LOOP(32, { + p_rd = (insn.p_imm10csl() & 0x200) ? (0xfffffc00 | insn.p_imm10csl()) : insn.p_imm10csl(); +} +) diff --git a/riscv/insns/plui_w.h b/riscv/insns/plui_w.h new file mode 100644 index 00000000..64461192 --- /dev/null +++ b/riscv/insns/plui_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_LOOP(32, { + p_rd = insn.p_imm10csrw(); +} +) diff --git a/riscv/insns/pmax_w.h b/riscv/insns/pmax_w.h new file mode 100644 index 00000000..ce11a5bb --- /dev/null +++ b/riscv/insns/pmax_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + p_rd = (p_rs1 > p_rs2) ? p_rs1 : p_rs2; +} +) diff --git a/riscv/insns/pmaxu_w.h b/riscv/insns/pmaxu_w.h new file mode 100644 index 00000000..76648af7 --- /dev/null +++ b/riscv/insns/pmaxu_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_ULOOP(32,32,32, { + p_rd = (p_rs1 > p_rs2) ? p_rs1 : p_rs2; +} +) diff --git a/riscv/insns/pmin_w.h b/riscv/insns/pmin_w.h new file mode 100644 index 00000000..3afc921f --- /dev/null +++ b/riscv/insns/pmin_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + p_rd = (p_rs1 < p_rs2) ? p_rs1 : p_rs2; +} +) diff --git a/riscv/insns/pminu_w.h b/riscv/insns/pminu_w.h new file mode 100644 index 00000000..a3b671d5 --- /dev/null +++ b/riscv/insns/pminu_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_ULOOP(32,32,32, { + p_rd = (p_rs1 < p_rs2) ? p_rs1 : p_rs2; +} +) diff --git a/riscv/insns/pmseq_w.h b/riscv/insns/pmseq_w.h new file mode 100644 index 00000000..9bf60850 --- /dev/null +++ b/riscv/insns/pmseq_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + p_rd = (p_rs1 == p_rs2) ? -1 : 0; +} +) diff --git a/riscv/insns/pmslt_w.h b/riscv/insns/pmslt_w.h new file mode 100644 index 00000000..41ca2410 --- /dev/null +++ b/riscv/insns/pmslt_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + p_rd = (p_rs1 < p_rs2) ? -1 : 0; +} +) diff --git a/riscv/insns/pmsltu_w.h b/riscv/insns/pmsltu_w.h new file mode 100644 index 00000000..a96e0486 --- /dev/null +++ b/riscv/insns/pmsltu_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_ULOOP(32,32,32, { + p_rd = (p_rs1 < p_rs2) ? -1 : 0; +} +) diff --git a/riscv/insns/ppaire_h.h b/riscv/insns/ppaire_h.h new file mode 100644 index 00000000..a1fef4a9 --- /dev/null +++ b/riscv/insns/ppaire_h.h @@ -0,0 +1 @@ +P_PACK(16, 0, 0); \ No newline at end of file diff --git a/riscv/insns/ppaireo_w.h b/riscv/insns/ppaireo_w.h new file mode 100644 index 00000000..5dd3e2ef --- /dev/null +++ b/riscv/insns/ppaireo_w.h @@ -0,0 +1,2 @@ +require_rv64; +P_PACK(32, 0, 1); \ No newline at end of file diff --git a/riscv/insns/ppairo_w.h b/riscv/insns/ppairo_w.h new file mode 100644 index 00000000..38d2dfd0 --- /dev/null +++ b/riscv/insns/ppairo_w.h @@ -0,0 +1,2 @@ +require_rv64; +P_PACK(32, 1, 1); diff --git a/riscv/insns/ppairoe_w.h b/riscv/insns/ppairoe_w.h new file mode 100644 index 00000000..df6a6683 --- /dev/null +++ b/riscv/insns/ppairoe_w.h @@ -0,0 +1,2 @@ +require_rv64; +P_PACK(32, 1, 0); \ No newline at end of file diff --git a/riscv/insns/predsum_ws.h b/riscv/insns/predsum_ws.h new file mode 100644 index 00000000..ba5fc69a --- /dev/null +++ b/riscv/insns/predsum_ws.h @@ -0,0 +1,6 @@ +require_rv64; +reg_t rd_tmp = RS2; \ +P_RS1_LOOP_BASE(32) + P_RS1_PARAMS(32) + rd_tmp += sext_xlen(p_rs1); +P_RD_LOOP_END() diff --git a/riscv/insns/predsumu_ws.h b/riscv/insns/predsumu_ws.h new file mode 100644 index 00000000..98a3aa91 --- /dev/null +++ b/riscv/insns/predsumu_ws.h @@ -0,0 +1,6 @@ +require_rv64; +reg_t rd_tmp = RS2; \ +P_RS1_LOOP_BASE(32) + P_RS1_UPARAMS(32) + rd_tmp += zext_xlen(p_rs1); +P_RD_LOOP_END() diff --git a/riscv/insns/psa_wx.h b/riscv/insns/psa_wx.h new file mode 100644 index 00000000..b930d5ea --- /dev/null +++ b/riscv/insns/psa_wx.h @@ -0,0 +1,7 @@ +require_rv64; +P_CROSS_LOOP(32, { + p_rd = p_rs1 - p_rs2; +}, { + p_rd = p_rs1 + p_rs2; +} +) diff --git a/riscv/insns/psadd_w.h b/riscv/insns/psadd_w.h new file mode 100644 index 00000000..7702b936 --- /dev/null +++ b/riscv/insns/psadd_w.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + bool sat = false; + p_rd = (sat_add(p_rs1, p_rs2, sat)); +} +) diff --git a/riscv/insns/psaddu_w.h b/riscv/insns/psaddu_w.h new file mode 100644 index 00000000..4ff52136 --- /dev/null +++ b/riscv/insns/psaddu_w.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_ULOOP(32,32,32, { + bool sat = false; + p_rd = (sat_addu(p_rs1, p_rs2, sat)); +} +) diff --git a/riscv/insns/psas_wx.h b/riscv/insns/psas_wx.h new file mode 100644 index 00000000..7c403ce2 --- /dev/null +++ b/riscv/insns/psas_wx.h @@ -0,0 +1,9 @@ +require_rv64; +P_CROSS_ULOOP(32, { + bool sat = false; + p_rd = (sat_add(p_rs1, p_rs2, sat)); +}, { + bool sat = false; + p_rd = (sat_sub(p_rs1, p_rs2, sat)); +} +) diff --git a/riscv/insns/psati_w.h b/riscv/insns/psati_w.h new file mode 100644 index 00000000..499beceb --- /dev/null +++ b/riscv/insns/psati_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = P_SAT(insn.shamtw() + 1, p_rs1); +} +) diff --git a/riscv/insns/psext_w_b.h b/riscv/insns/psext_w_b.h new file mode 100644 index 00000000..cb5217f3 --- /dev/null +++ b/riscv/insns/psext_w_b.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = (int32_t)(int8_t)p_rs1; +} +) diff --git a/riscv/insns/psext_w_h.h b/riscv/insns/psext_w_h.h new file mode 100644 index 00000000..a0a1ee09 --- /dev/null +++ b/riscv/insns/psext_w_h.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = (int32_t)(int16_t)p_rs1; +} +) diff --git a/riscv/insns/psh1add_w.h b/riscv/insns/psh1add_w.h new file mode 100644 index 00000000..8c280053 --- /dev/null +++ b/riscv/insns/psh1add_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32, 32, 32, { + p_rd = (p_rs1 << 1) + p_rs2; +} +) diff --git a/riscv/insns/psll_ws.h b/riscv/insns/psll_ws.h new file mode 100644 index 00000000..d86c2b46 --- /dev/null +++ b/riscv/insns/psll_ws.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = p_rs1 << (RS2 & (32 - 1)); +} +) diff --git a/riscv/insns/pslli_w.h b/riscv/insns/pslli_w.h new file mode 100644 index 00000000..cd19c7ac --- /dev/null +++ b/riscv/insns/pslli_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = p_rs1 << insn.shamtw(); +} +) diff --git a/riscv/insns/psra_ws.h b/riscv/insns/psra_ws.h new file mode 100644 index 00000000..3fd1539d --- /dev/null +++ b/riscv/insns/psra_ws.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = p_rs1 >> (RS2 & (32 - 1)); +} +) diff --git a/riscv/insns/psrai_w.h b/riscv/insns/psrai_w.h new file mode 100644 index 00000000..06d81812 --- /dev/null +++ b/riscv/insns/psrai_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = p_rs1 >> insn.shamtw(); +} +) diff --git a/riscv/insns/psrari_w.h b/riscv/insns/psrari_w.h new file mode 100644 index 00000000..a3d02f17 --- /dev/null +++ b/riscv/insns/psrari_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = insn.shamtw() ? ((p_rs1 >> insn.shamtw()) + ((p_rs1 >> (insn.shamtw() - 1)) & 1)) : p_rs1; +} +) diff --git a/riscv/insns/psrl_ws.h b/riscv/insns/psrl_ws.h new file mode 100644 index 00000000..50f784d9 --- /dev/null +++ b/riscv/insns/psrl_ws.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_ULOOP(32, 32, { + p_rd = p_rs1 >> (RS2 & (32 - 1)); +} +) diff --git a/riscv/insns/psrli_w.h b/riscv/insns/psrli_w.h new file mode 100644 index 00000000..a29bdba1 --- /dev/null +++ b/riscv/insns/psrli_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_ULOOP(32, 32, { + p_rd = p_rs1 >> insn.shamtw(); +} +) diff --git a/riscv/insns/pssa_wx.h b/riscv/insns/pssa_wx.h new file mode 100644 index 00000000..66f5d638 --- /dev/null +++ b/riscv/insns/pssa_wx.h @@ -0,0 +1,9 @@ +require_rv64; +P_CROSS_ULOOP(32, { + bool sat = false; + p_rd = (sat_sub(p_rs1, p_rs2, sat)); +}, { + bool sat = false; + p_rd = (sat_add(p_rs1, p_rs2, sat)); +} +) diff --git a/riscv/insns/pssh1sadd_w.h b/riscv/insns/pssh1sadd_w.h new file mode 100644 index 00000000..a84c17b0 --- /dev/null +++ b/riscv/insns/pssh1sadd_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32, 32, 32, { + p_rd = P_SAT(32, P_SAT(32, p_rs1 << 1) + p_rs2); +} +) diff --git a/riscv/insns/pssha_ws.h b/riscv/insns/pssha_ws.h new file mode 100644 index 00000000..512132bb --- /dev/null +++ b/riscv/insns/pssha_ws.h @@ -0,0 +1,13 @@ +require_rv64; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +P_RD_RS1_LOOP(32, 32, { + if (p_rs1 == 0) + p_rd = 0; + else if (sshamt >= 32) + p_rd = (p_rs1 & 0x80000000) ? 0x80000000 : 0x7fffffff; + else if (sshamt <= -32) + p_rd = (p_rs1 & 0x80000000) ? 0xffffffff : 0; + else + p_rd = sshamt >= 0 ? P_SAT(32, sext32(p_rs1) << sshamt) : (p_rs1 >> -sshamt); +} +) diff --git a/riscv/insns/psshar_ws.h b/riscv/insns/psshar_ws.h new file mode 100644 index 00000000..e63b8500 --- /dev/null +++ b/riscv/insns/psshar_ws.h @@ -0,0 +1,13 @@ +require_rv64; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +P_RD_RS1_LOOP(32, 32, { + if (p_rs1 == 0) + p_rd = 0; + else if (sshamt >= 32) + p_rd = (p_rs1 & 0x80000000) ? 0x80000000 : 0x7fffffff; + else if (sshamt <= -32) + p_rd = 0; + else + p_rd = sshamt >= 0 ? P_SAT(32, sext32(p_rs1) << sshamt) : ((p_rs1 >> -sshamt) + ((p_rs1 >> (-sshamt - 1)) & 1)); +} +) diff --git a/riscv/insns/psslai_w.h b/riscv/insns/psslai_w.h new file mode 100644 index 00000000..d44cbada --- /dev/null +++ b/riscv/insns/psslai_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = P_SAT(32, sext32(p_rs1) << insn.shamtw()); +} +) diff --git a/riscv/insns/pssub_w.h b/riscv/insns/pssub_w.h new file mode 100644 index 00000000..0cfa1072 --- /dev/null +++ b/riscv/insns/pssub_w.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + bool sat = false; + p_rd = (sat_sub(p_rs1, p_rs2, sat)); +} +) diff --git a/riscv/insns/pssubu_w.h b/riscv/insns/pssubu_w.h new file mode 100644 index 00000000..e4a42adc --- /dev/null +++ b/riscv/insns/pssubu_w.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_ULOOP(32,32,32, { + bool sat = false; + p_rd = (sat_subu(p_rs1, p_rs2, sat)); +} +) diff --git a/riscv/insns/psub_w.h b/riscv/insns/psub_w.h new file mode 100644 index 00000000..3ccffe29 --- /dev/null +++ b/riscv/insns/psub_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32, 32, 32, { + p_rd = p_rs1 - p_rs2; +} +) diff --git a/riscv/insns/pusati_w.h b/riscv/insns/pusati_w.h new file mode 100644 index 00000000..adc0bd28 --- /dev/null +++ b/riscv/insns/pusati_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = P_USAT(insn.shamtw() + 1, p_rs1); +} +) diff --git a/riscv/insns/rev.h b/riscv/insns/rev.h new file mode 100644 index 00000000..c2f9dd42 --- /dev/null +++ b/riscv/insns/rev.h @@ -0,0 +1,3 @@ +require_extension('P'); + +#include "grevi.h" diff --git a/riscv/insns/rev16.h b/riscv/insns/rev16.h new file mode 100644 index 00000000..877a1a13 --- /dev/null +++ b/riscv/insns/rev16.h @@ -0,0 +1,4 @@ +require_rv64; +require_extension('P'); + +#include "grevi.h" diff --git a/riscv/insns/rev_rv32.h b/riscv/insns/rev_rv32.h new file mode 100644 index 00000000..c2f9dd42 --- /dev/null +++ b/riscv/insns/rev_rv32.h @@ -0,0 +1,3 @@ +require_extension('P'); + +#include "grevi.h" diff --git a/riscv/insns/sha.h b/riscv/insns/sha.h new file mode 100644 index 00000000..fcec6249 --- /dev/null +++ b/riscv/insns/sha.h @@ -0,0 +1,11 @@ +require_extension('P'); +require_rv64; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +if (RS1 == 0) + WRITE_RD(0); +else if (sshamt >= 64) + WRITE_RD(0); +else if (sshamt <= -64) + WRITE_RD((RS1 & 0x8000000000000000) ? 0xffffffffffffffff : 0); +else + WRITE_RD(sshamt >= 0 ? (RS1 << sshamt) : ((sreg_t)RS1 >> -sshamt)); diff --git a/riscv/insns/shar.h b/riscv/insns/shar.h new file mode 100644 index 00000000..f6348277 --- /dev/null +++ b/riscv/insns/shar.h @@ -0,0 +1,11 @@ +require_extension('P'); +require_rv64; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +if (RS1 == 0) + WRITE_RD(0); +else if (sshamt >= 64) + WRITE_RD(0); +else if (sshamt <= -64) + WRITE_RD(0); +else + WRITE_RD(sshamt >= 0 ? (RS1 << sshamt) : (((sreg_t)RS1 >> -sshamt) + ((RS1 >> (-sshamt - 1)) & 1))); diff --git a/riscv/overlap_list.h b/riscv/overlap_list.h index 253be457..0e7f2335 100644 --- a/riscv/overlap_list.h +++ b/riscv/overlap_list.h @@ -32,3 +32,23 @@ DECLARE_OVERLAP_INSN(sspopchk_x5, EXT_ZICFISS) DECLARE_OVERLAP_INSN(c_sspush_x1, EXT_ZICFISS) DECLARE_OVERLAP_INSN(c_sspopchk_x5, EXT_ZICFISS) DECLARE_OVERLAP_INSN(c_mop_N, EXT_ZCMOP) + +// rv64p overlap rv32p +DECLARE_OVERLAP_INSN(paadd_w, 'P') +DECLARE_OVERLAP_INSN(paaddu_w, 'P') +DECLARE_OVERLAP_INSN(pasub_w, 'P') +DECLARE_OVERLAP_INSN(pasubu_w, 'P') +DECLARE_OVERLAP_INSN(psadd_w, 'P') +DECLARE_OVERLAP_INSN(psaddu_w, 'P') +DECLARE_OVERLAP_INSN(pssh1sadd_w, 'P') +DECLARE_OVERLAP_INSN(pssub_w, 'P') +DECLARE_OVERLAP_INSN(pssubu_w, 'P') +DECLARE_OVERLAP_INSN(psati_w, 'P') +DECLARE_OVERLAP_INSN(pusati_w, 'P') +DECLARE_OVERLAP_INSN(psrari_w, 'P') +DECLARE_OVERLAP_INSN(pssha_ws, 'P') +DECLARE_OVERLAP_INSN(psshar_ws, 'P') +DECLARE_OVERLAP_INSN(psslai_w, 'P') +DECLARE_OVERLAP_INSN(pmseq_w, 'P') +DECLARE_OVERLAP_INSN(pmslt_w, 'P') +DECLARE_OVERLAP_INSN(pmsltu_w, 'P') diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index 7af13b96..596f71d0 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -1587,6 +1587,59 @@ riscv_insn_ext_p = \ pm2wsuba_h \ pm2wsub_hx \ pm2wsuba_hx \ + pli_w \ + plui_w \ + paadd_w \ + paaddu_w \ + padd_w \ + padd_ws \ + pasub_w \ + pasubu_w \ + psadd_w \ + psaddu_w \ + psh1add_w \ + pssh1sadd_w \ + pssub_w \ + pssubu_w \ + psub_w \ + paas_wx \ + pas_wx \ + pasa_wx \ + psa_wx \ + psas_wx \ + pssa_wx \ + predsum_ws \ + predsumu_ws \ + psati_w \ + psext_w_b \ + psext_w_h \ + pusati_w \ + psll_ws \ + pslli_w \ + psra_ws \ + psrai_w \ + psrari_w \ + psrl_ws \ + psrli_w \ + pssha_ws \ + psshar_ws \ + psslai_w \ + sha \ + shar \ + pmax_w \ + pmaxu_w \ + pmin_w \ + pminu_w \ + pmseq_w \ + pmslt_w \ + pmsltu_w \ + ppaire_h \ + ppaireo_w \ + ppairo_w \ + ppairoe_w \ + rev \ + rev16 \ + rev_rv32 \ riscv_insn_list = \ $(riscv_insn_ext_i) \