rvv: update the fractional lmul checking rule to rvv1.0-draft

6 years ago · 6d9617bdb8
2 changed files with 2 additions and 1 deletions
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@ -397,7 +397,7 @@ reg_t processor_t::vectorUnit_t::set_vl(int rd, int rs1, reg_t reqVL, reg_t newT

    vill = !(vflmul >= 0.125 && vflmul <= 8)
           || vsew > ELEN
-           || vflmul < ((float)vsew / ELEN)
+           || vflmul < ((float)vsew_min / ELEN)
           || vediv != 1
           || (newType >> 8) != 0;

--- a/riscv/processor.h
+++ b/riscv/processor.h
@ -488,6 +488,7 @@ public:
      reg_t vstart, vxrm, vxsat, vl, vtype, vlenb;
      reg_t vma, vta;
      reg_t vediv, vsew;
+      const reg_t vsew_min = 8; // the narrowest supported SEW value at LMUL=1
      float vflmul;
      reg_t ELEN, VLEN;
      bool vill;