diff --git a/riscv/decode.h b/riscv/decode.h
index 65916126..7ca91c9e 100644
--- a/riscv/decode.h
+++ b/riscv/decode.h
@@ -373,7 +373,11 @@ inline freg_t f128_negate(freg_t a)
 #define validate_csr(which, write) ({ \
   if (!STATE.serialized) return PC_SERIALIZE_BEFORE; \
   STATE.serialized = false; \
-  /* permissions check occurs in get_csr */ \
+  /* disallow writes to read-only CSRs */ \
+  unsigned csr_read_only = get_field((which), 0xC00) == 3; \
+  if ((write) && csr_read_only) \
+    throw trap_illegal_instruction(insn.bits()); \
+  /* other permissions checks occur in get_csr */ \
   (which); })
 
 /* For debug only. This will fail if the native machine's float types are not IEEE */