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@ -25,7 +25,6 @@ const int NFPR = 1 << FPRID_BITS; |
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const int IMM_BITS = 12; |
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const int IMM_BITS = 12; |
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const int IMMLO_BITS = 7; |
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const int IMMLO_BITS = 7; |
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const int TARGET_BITS = 25; |
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const int TARGET_BITS = 25; |
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const int SHAMT_BITS = 6; |
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const int FUNCT_BITS = 3; |
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const int FUNCT_BITS = 3; |
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const int FUNCTR_BITS = 7; |
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const int FUNCTR_BITS = 7; |
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const int FFUNCT_BITS = 5; |
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const int FFUNCT_BITS = 5; |
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@ -167,8 +166,8 @@ private: |
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#define BIGIMM insn.ltype.bigimm |
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#define BIGIMM insn.ltype.bigimm |
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#define SIMM insn.itype.imm12 |
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#define SIMM insn.itype.imm12 |
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#define BIMM ((signed)insn.btype.immlo | (insn.btype.immhi << IMMLO_BITS)) |
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#define BIMM ((signed)insn.btype.immlo | (insn.btype.immhi << IMMLO_BITS)) |
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#define SHAMT ((insn.itype.imm12 >> (IMM_BITS-6)) & 0x3F) |
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#define SHAMT (insn.itype.imm12 & 0x3F) |
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#define SHAMTW ((insn.itype.imm12 >> (IMM_BITS-6)) & 0x1F) |
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#define SHAMTW (insn.itype.imm12 & 0x1F) |
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#define TARGET insn.jtype.target |
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#define TARGET insn.jtype.target |
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#define BRANCH_TARGET (npc + (BIMM << BRANCH_ALIGN_BITS)) |
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#define BRANCH_TARGET (npc + (BIMM << BRANCH_ALIGN_BITS)) |
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#define JUMP_TARGET (npc + (TARGET << JUMP_ALIGN_BITS)) |
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#define JUMP_TARGET (npc + (TARGET << JUMP_ALIGN_BITS)) |
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