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[opcodes,pk,sim,xcc] great renumbering of 2011, part deux

cs250
Andrew Waterman 16 years ago
parent
commit
5bae2bf372
  1. 5
      riscv/decode.h
  2. 1056
      riscv/execute.h
  3. 3
      riscv/insns/fsel_d.h
  4. 3
      riscv/insns/fsel_s.h

5
riscv/decode.h

@ -25,7 +25,6 @@ const int NFPR = 1 << FPRID_BITS;
const int IMM_BITS = 12;
const int IMMLO_BITS = 7;
const int TARGET_BITS = 25;
const int SHAMT_BITS = 6;
const int FUNCT_BITS = 3;
const int FUNCTR_BITS = 7;
const int FFUNCT_BITS = 5;
@ -167,8 +166,8 @@ private:
#define BIGIMM insn.ltype.bigimm
#define SIMM insn.itype.imm12
#define BIMM ((signed)insn.btype.immlo | (insn.btype.immhi << IMMLO_BITS))
#define SHAMT ((insn.itype.imm12 >> (IMM_BITS-6)) & 0x3F)
#define SHAMTW ((insn.itype.imm12 >> (IMM_BITS-6)) & 0x1F)
#define SHAMT (insn.itype.imm12 & 0x3F)
#define SHAMTW (insn.itype.imm12 & 0x1F)
#define TARGET insn.jtype.target
#define BRANCH_TARGET (npc + (BIMM << BRANCH_ALIGN_BITS))
#define JUMP_TARGET (npc + (TARGET << JUMP_ALIGN_BITS))

1056
riscv/execute.h

File diff suppressed because it is too large

3
riscv/insns/fsel_d.h

@ -1,3 +0,0 @@
require_fp;
FRD = !f64_eq(FRS1, 0) ? FRS2 : FRS3;
set_fp_exceptions;

3
riscv/insns/fsel_s.h

@ -1,3 +0,0 @@
require_fp;
FRD = !f32_eq(FRS1, 0) ? FRS2 : FRS3;
set_fp_exceptions;
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