diff --git a/riscv/execute.cc b/riscv/execute.cc index c29eb2d6..39d5ca44 100644 --- a/riscv/execute.cc +++ b/riscv/execute.cc @@ -342,10 +342,6 @@ void processor_t::step(size_t n) } catch (triggers::matched_t& t) { - if (mmu->matched_trigger) { - delete mmu->matched_trigger; - mmu->matched_trigger = NULL; - } take_trigger_action(t.action, t.address, pc, t.gva); } catch(trap_debug_mode&) diff --git a/riscv/mmu.cc b/riscv/mmu.cc index f9a8eb15..7991567b 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -14,8 +14,7 @@ mmu_t::mmu_t(simif_t* sim, endianness_t endianness, processor_t* proc) #endif check_triggers_fetch(false), check_triggers_load(false), - check_triggers_store(false), - matched_trigger(NULL) + check_triggers_store(false) { #ifndef RISCV_ENABLE_DUAL_ENDIAN assert(endianness == endianness_little); @@ -188,7 +187,7 @@ void mmu_t::check_triggers(triggers::operation_t operation, reg_t address, bool // We want to take this exception on the next instruction. We check // whether to do so in the I$ refill path, so flush the I$. flush_icache(); - matched_trigger = new triggers::matched_t(operation, tval, match->action, virt); + matched_trigger = triggers::matched_t(operation, tval, match->action, virt); } } diff --git a/riscv/mmu.h b/riscv/mmu.h index 9990d97b..de27ccae 100644 --- a/riscv/mmu.h +++ b/riscv/mmu.h @@ -293,8 +293,11 @@ public: inline icache_entry_t* refill_icache(reg_t addr, icache_entry_t* entry) { - if (matched_trigger) - throw *matched_trigger; + if (matched_trigger) { + auto trig = matched_trigger.value(); + matched_trigger.reset(); + throw trig; + } auto [first_parcel, paddr] = fetch_insn_parcel_and_paddr(addr); insn_bits_t insn = first_parcel; @@ -507,8 +510,7 @@ private: bool check_triggers_fetch; bool check_triggers_load; bool check_triggers_store; - // The exception describing a matched trigger, or NULL. - triggers::matched_t *matched_trigger; + std::optional matched_trigger; friend class processor_t; };