From 526d3997e68200ef3f372384acdc13e8e8b92e31 Mon Sep 17 00:00:00 2001 From: Tim Newsome Date: Thu, 21 Sep 2017 12:34:42 -0700 Subject: [PATCH 1/2] Fix debug reset. ndmreset now resets all harts (instead of just the current hart), and hartreset resets the selected hart (instead of being ignored). --- riscv/debug_module.cc | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/riscv/debug_module.cc b/riscv/debug_module.cc index 53df8a47..8d73f07d 100644 --- a/riscv/debug_module.cc +++ b/riscv/debug_module.cc @@ -459,10 +459,16 @@ bool debug_module_t::dmi_write(unsigned address, uint32_t value) debug_rom_flags[dmcontrol.hartsel] |= (1 << DEBUG_ROM_FLAG_RESUME); resumeack[dmcontrol.hartsel] = false; } - if (dmcontrol.ndmreset) { + if (dmcontrol.hartreset) { proc->reset(); } } + if (dmcontrol.ndmreset) { + for (size_t i = 0; i < sim->nprocs(); i++) { + proc = sim->get_core(i); + proc->reset(); + } + } } return true; From def8b3e05d754c8115deb0c8b8c91dc4e33975fd Mon Sep 17 00:00:00 2001 From: Tim Newsome Date: Thu, 21 Sep 2017 14:54:06 -0700 Subject: [PATCH 2/2] Actually let hartreset be set. --- riscv/debug_module.cc | 1 + 1 file changed, 1 insertion(+) diff --git a/riscv/debug_module.cc b/riscv/debug_module.cc index 8d73f07d..985cbbdc 100644 --- a/riscv/debug_module.cc +++ b/riscv/debug_module.cc @@ -447,6 +447,7 @@ bool debug_module_t::dmi_write(unsigned address, uint32_t value) if (dmcontrol.dmactive) { dmcontrol.haltreq = get_field(value, DMI_DMCONTROL_HALTREQ); dmcontrol.resumereq = get_field(value, DMI_DMCONTROL_RESUMEREQ); + dmcontrol.hartreset = get_field(value, DMI_DMCONTROL_HARTRESET); dmcontrol.ndmreset = get_field(value, DMI_DMCONTROL_NDMRESET); dmcontrol.hartsel = get_field(value, DMI_DMCONTROL_HARTSEL); } else {