encoding: udpate and move platform-related define out

Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>

fesvr/htif.cc

@@ -3,7 +3,7 @@
 #include "htif.h"
 #include "rfb.h"
 #include "elfloader.h"
-#include "encoding.h"
+#include "platform.h"
 #include "byteorder.h"
 #include <algorithm>
 #include <assert.h>

riscv/devices.h

@@ -4,6 +4,7 @@
 #include "decode.h"
 #include "mmio_plugin.h"
 #include "abstract_device.h"
+#include "platform.h"
 #include <map>
 #include <vector>
 #include <utility>

riscv/dts.cc

@@ -2,6 +2,7 @@
 
 #include "dts.h"
 #include "libfdt.h"
+#include "platform.h"
 #include <iostream>
 #include <sstream>
 #include <signal.h>

riscv/encoding.h

@@ -1,6 +1,6 @@
 /*
  * This file is auto-generated by running 'make ../riscv-isa-sim/riscv/encoding.h' in
- * https://github.com/riscv/riscv-opcodes (e8f0392)
+ * https://github.com/riscv/riscv-opcodes (7d1a0e3)
  */
 
 /* See LICENSE for license details. */
@@ -211,12 +211,6 @@
 #define IRQ_COP      12
 #define IRQ_HOST     13
 
-#define DEFAULT_RSTVEC     0x00001000
-#define CLINT_BASE         0x02000000
-#define CLINT_SIZE         0x000c0000
-#define EXT_IO_BASE        0x40000000
-#define DRAM_BASE          0x80000000
-
 /* page table entry (PTE) fields */
 #define PTE_V     0x001 /* Valid */
 #define PTE_R     0x002 /* Read */

riscv/platform.h

@@ -0,0 +1,11 @@
+// See LICENSE for license details.
+#ifndef _RISCV_PLATFORM_H
+#define _RISCV_PLATFROM_H
+
+#define DEFAULT_RSTVEC     0x00001000
+#define CLINT_BASE         0x02000000
+#define CLINT_SIZE         0x000c0000
+#define EXT_IO_BASE        0x40000000
+#define DRAM_BASE          0x80000000
+
+#endif

riscv/processor.cc

@@ -8,6 +8,7 @@
 #include "simif.h"
 #include "mmu.h"
 #include "disasm.h"
+#include "platform.h"
 #include <cinttypes>
 #include <cmath>
 #include <cstdlib>

riscv/sim.cc

@@ -5,6 +5,7 @@
 #include "dts.h"
 #include "remote_bitbang.h"
 #include "byteorder.h"
+#include "platform.h"
 #include <fstream>
 #include <map>
 #include <iostream>