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@ -795,17 +795,24 @@ disassembler_t::disassembler_t(int xlen) |
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} |
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} |
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//handle whole register load
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if (elt >= 4) |
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continue; |
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const custom_fmt_t template_insn2[] = { |
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{match_vl1re8_v, mask_vl1re8_v, "vl%dre%d.v", v_ld_unit}, |
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}; |
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for (reg_t i = 0, nf = 7; nf < 4; i++, nf >>= 1) { |
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for (auto item : template_insn) { |
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for (reg_t i = 0, nf = 7; i < 4; i++, nf >>= 1) { |
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for (auto item : template_insn2) { |
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const reg_t match_nf = nf << 29; |
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char buf[128]; |
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sprintf(buf, item.fmt, nf + 1, 8 << elt); |
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add_insn(new disasm_insn_t( |
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buf, item.match | match_nf, item.mask | mask_nf, item.arg |
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buf, |
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item.match | match_nf | elt_map[elt], |
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item.mask | mask_nf, |
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item.arg |
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)); |
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} |
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} |
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