diff --git a/fesvr/dtm.cc b/fesvr/dtm.cc
index b5de14c0..635fab1a 100644
--- a/fesvr/dtm.cc
+++ b/fesvr/dtm.cc
@@ -44,9 +44,6 @@
 #define CLEAR 3
 #define CSRRx(type, dst, csr, src) (0x73 | ((type) << 12) | ((dst) << 7) | ((src) << 15) | (uint32_t)((csr) << 20))
 
-#define get_field(reg, mask) (((reg) & (mask)) / ((mask) & ~((mask) << 1)))
-#define set_field(reg, mask, val) (((reg) & ~(mask)) | (((val) * ((mask) & ~((mask) << 1))) & (mask)))
-
 #define RUN_AC_OR_DIE(a, b, c, d, e) { \
     uint32_t cmderr = run_abstract_command(a, b, c, d, e);      \
     if (cmderr) {                                               \
diff --git a/fesvr/memif.h b/fesvr/memif.h
index e641d21c..aa4ca98d 100644
--- a/fesvr/memif.h
+++ b/fesvr/memif.h
@@ -7,16 +7,12 @@
 #include <stddef.h>
 #include <stdexcept>
 #include "byteorder.h"
+#include "cfg.h"
 
 typedef uint64_t reg_t;
 typedef int64_t sreg_t;
 typedef reg_t addr_t;
 
-typedef enum {
-  memif_endianness_little,
-  memif_endianness_big
-} memif_endianness_t;
-
 class chunked_memif_t
 {
 public:
diff --git a/riscv/cfg.h b/riscv/cfg.h
index 7e440ad4..1ca7c77b 100644
--- a/riscv/cfg.h
+++ b/riscv/cfg.h
@@ -4,9 +4,13 @@
 
 #include <optional>
 #include "decode.h"
-#include "mmu.h"
 #include <cassert>
 
+typedef enum {
+  memif_endianness_little,
+  memif_endianness_big
+} memif_endianness_t;
+
 template <typename T>
 class cfg_arg_t {
 public:
diff --git a/riscv/mmu.h b/riscv/mmu.h
index 5d18aa92..5d92a9e8 100644
--- a/riscv/mmu.h
+++ b/riscv/mmu.h
@@ -12,6 +12,7 @@
 #include "memtracer.h"
 #include "byteorder.h"
 #include "triggers.h"
+#include "cfg.h"
 #include <stdlib.h>
 #include <vector>