diff --git a/riscv/abstract_device.h b/riscv/abstract_device.h index 0726cd7c..d8ddbabe 100644 --- a/riscv/abstract_device.h +++ b/riscv/abstract_device.h @@ -16,6 +16,7 @@ class abstract_device_t { public: virtual bool load(reg_t addr, size_t len, uint8_t* bytes) = 0; virtual bool store(reg_t addr, size_t len, const uint8_t* bytes) = 0; + virtual reg_t size() = 0; virtual ~abstract_device_t() {} virtual void tick(reg_t UNUSED rtc_ticks) {} }; diff --git a/riscv/debug_module.cc b/riscv/debug_module.cc index 7c597444..d7e868ba 100644 --- a/riscv/debug_module.cc +++ b/riscv/debug_module.cc @@ -249,6 +249,11 @@ bool debug_module_t::store(reg_t addr, size_t len, const uint8_t* bytes) return false; } +reg_t debug_module_t::size() +{ + return PGSIZE; +} + void debug_module_t::write32(uint8_t *memory, unsigned int index, uint32_t value) { uint8_t* base = memory + index * 4; diff --git a/riscv/debug_module.h b/riscv/debug_module.h index 37714891..904f03e2 100644 --- a/riscv/debug_module.h +++ b/riscv/debug_module.h @@ -114,8 +114,9 @@ class debug_module_t : public abstract_device_t debug_module_t(simif_t *sim, const debug_module_config_t &config); ~debug_module_t(); - bool load(reg_t addr, size_t len, uint8_t* bytes); - bool store(reg_t addr, size_t len, const uint8_t* bytes); + bool load(reg_t addr, size_t len, uint8_t* bytes) override; + bool store(reg_t addr, size_t len, const uint8_t* bytes) override; + reg_t size() override; // Debug Module Interface that the debugger (in our case through JTAG DTM) // uses to access the DM. diff --git a/riscv/devices.cc b/riscv/devices.cc index f0f888dd..d0c7de50 100644 --- a/riscv/devices.cc +++ b/riscv/devices.cc @@ -27,6 +27,13 @@ bool bus_t::store(reg_t addr, size_t len, const uint8_t* bytes) return false; } +reg_t bus_t::size() +{ + if (auto last = devices.rbegin(); last != devices.rend()) + return last->first + last->second->size(); + return 0; +} + std::pair bus_t::find_device(reg_t addr) { // Obtain iterator to device immediately after the one that might match diff --git a/riscv/devices.h b/riscv/devices.h index 971d59e9..c6d924b3 100644 --- a/riscv/devices.h +++ b/riscv/devices.h @@ -18,6 +18,7 @@ class bus_t : public abstract_device_t { public: bool load(reg_t addr, size_t len, uint8_t* bytes) override; bool store(reg_t addr, size_t len, const uint8_t* bytes) override; + reg_t size() override; void add_device(reg_t addr, abstract_device_t* dev); std::pair find_device(reg_t addr); @@ -32,6 +33,7 @@ class rom_device_t : public abstract_device_t { rom_device_t(std::vector data); bool load(reg_t addr, size_t len, uint8_t* bytes) override; bool store(reg_t addr, size_t len, const uint8_t* bytes) override; + reg_t size() override { return data.size(); } const std::vector& contents() { return data; } private: std::vector data; @@ -70,7 +72,7 @@ class clint_t : public abstract_device_t { clint_t(const simif_t*, uint64_t freq_hz, bool real_time); bool load(reg_t addr, size_t len, uint8_t* bytes) override; bool store(reg_t addr, size_t len, const uint8_t* bytes) override; - size_t size() { return CLINT_SIZE; } + reg_t size() override { return CLINT_SIZE; } void tick(reg_t rtc_ticks) override; uint64_t get_mtimecmp(reg_t hartid) { return mtimecmp[hartid]; } uint64_t get_mtime() { return mtime; } @@ -110,7 +112,7 @@ class plic_t : public abstract_device_t, public abstract_interrupt_controller_t bool load(reg_t addr, size_t len, uint8_t* bytes) override; bool store(reg_t addr, size_t len, const uint8_t* bytes) override; void set_interrupt_level(uint32_t id, int lvl) override; - size_t size() { return PLIC_SIZE; } + reg_t size() override { return PLIC_SIZE; } private: std::vector contexts; uint32_t num_ids; @@ -141,7 +143,7 @@ class ns16550_t : public abstract_device_t { bool load(reg_t addr, size_t len, uint8_t* bytes) override; bool store(reg_t addr, size_t len, const uint8_t* bytes) override; void tick(reg_t rtc_ticks) override; - size_t size() { return NS16550_SIZE; } + reg_t size() override { return NS16550_SIZE; } private: abstract_interrupt_controller_t *intctrl; uint32_t interrupt_id; diff --git a/riscv/processor.cc b/riscv/processor.cc index 2917153a..b2f45f09 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -813,6 +813,11 @@ bool processor_t::store(reg_t addr, size_t len, const uint8_t* bytes) return false; } +reg_t processor_t::size() +{ + return PGSIZE; +} + void processor_t::trigger_updated(const std::vector &triggers) { mmu->flush_tlb(); diff --git a/riscv/processor.h b/riscv/processor.h index 4f22cbde..3bdfb52f 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -341,8 +341,9 @@ public: void register_extension(extension_t*); // MMIO slave interface - bool load(reg_t addr, size_t len, uint8_t* bytes); - bool store(reg_t addr, size_t len, const uint8_t* bytes); + bool load(reg_t addr, size_t len, uint8_t* bytes) override; + bool store(reg_t addr, size_t len, const uint8_t* bytes) override; + reg_t size() override; // When true, display disassembly of each instruction that's executed. bool debug;