Add abstract_device_t::size method; add to all devices

riscv/abstract_device.h

@@ -16,6 +16,7 @@ class abstract_device_t {
  public:
   virtual bool load(reg_t addr, size_t len, uint8_t* bytes) = 0;
   virtual bool store(reg_t addr, size_t len, const uint8_t* bytes) = 0;
+  virtual reg_t size() = 0;
   virtual ~abstract_device_t() {}
   virtual void tick(reg_t UNUSED rtc_ticks) {}
 };

riscv/debug_module.cc

@@ -249,6 +249,11 @@ bool debug_module_t::store(reg_t addr, size_t len, const uint8_t* bytes)
   return false;
 }
 
+reg_t debug_module_t::size()
+{
+  return PGSIZE;
+}
+
 void debug_module_t::write32(uint8_t *memory, unsigned int index, uint32_t value)
 {
   uint8_t* base = memory + index * 4;

riscv/debug_module.h

@@ -114,8 +114,9 @@ class debug_module_t : public abstract_device_t
     debug_module_t(simif_t *sim, const debug_module_config_t &config);
     ~debug_module_t();
 
-    bool load(reg_t addr, size_t len, uint8_t* bytes);
-    bool store(reg_t addr, size_t len, const uint8_t* bytes);
+    bool load(reg_t addr, size_t len, uint8_t* bytes) override;
+    bool store(reg_t addr, size_t len, const uint8_t* bytes) override;
+    reg_t size() override;
 
     // Debug Module Interface that the debugger (in our case through JTAG DTM)
     // uses to access the DM.

riscv/devices.cc

@@ -27,6 +27,13 @@ bool bus_t::store(reg_t addr, size_t len, const uint8_t* bytes)
   return false;
 }
 
+reg_t bus_t::size()
+{
+  if (auto last = devices.rbegin(); last != devices.rend())
+    return last->first + last->second->size();
+  return 0;
+}
+
 std::pair<reg_t, abstract_device_t*> bus_t::find_device(reg_t addr)
 {
   // Obtain iterator to device immediately after the one that might match

riscv/devices.h

@@ -18,6 +18,7 @@ class bus_t : public abstract_device_t {
  public:
   bool load(reg_t addr, size_t len, uint8_t* bytes) override;
   bool store(reg_t addr, size_t len, const uint8_t* bytes) override;
+  reg_t size() override;
   void add_device(reg_t addr, abstract_device_t* dev);
 
   std::pair<reg_t, abstract_device_t*> find_device(reg_t addr);
@@ -32,6 +33,7 @@ class rom_device_t : public abstract_device_t {
   rom_device_t(std::vector<char> data);
   bool load(reg_t addr, size_t len, uint8_t* bytes) override;
   bool store(reg_t addr, size_t len, const uint8_t* bytes) override;
+  reg_t size() override { return data.size(); }
   const std::vector<char>& contents() { return data; }
  private:
   std::vector<char> data;
@@ -70,7 +72,7 @@ class clint_t : public abstract_device_t {
   clint_t(const simif_t*, uint64_t freq_hz, bool real_time);
   bool load(reg_t addr, size_t len, uint8_t* bytes) override;
   bool store(reg_t addr, size_t len, const uint8_t* bytes) override;
-  size_t size() { return CLINT_SIZE; }
+  reg_t size() override { return CLINT_SIZE; }
   void tick(reg_t rtc_ticks) override;
   uint64_t get_mtimecmp(reg_t hartid) { return mtimecmp[hartid]; }
   uint64_t get_mtime() { return mtime; }
@@ -110,7 +112,7 @@ class plic_t : public abstract_device_t, public abstract_interrupt_controller_t
   bool load(reg_t addr, size_t len, uint8_t* bytes) override;
   bool store(reg_t addr, size_t len, const uint8_t* bytes) override;
   void set_interrupt_level(uint32_t id, int lvl) override;
-  size_t size() { return PLIC_SIZE; }
+  reg_t size() override { return PLIC_SIZE; }
  private:
   std::vector<plic_context_t> contexts;
   uint32_t num_ids;
@@ -141,7 +143,7 @@ class ns16550_t : public abstract_device_t {
   bool load(reg_t addr, size_t len, uint8_t* bytes) override;
   bool store(reg_t addr, size_t len, const uint8_t* bytes) override;
   void tick(reg_t rtc_ticks) override;
-  size_t size() { return NS16550_SIZE; }
+  reg_t size() override { return NS16550_SIZE; }
  private:
   abstract_interrupt_controller_t *intctrl;
   uint32_t interrupt_id;

riscv/processor.cc

@@ -813,6 +813,11 @@ bool processor_t::store(reg_t addr, size_t len, const uint8_t* bytes)
   return false;
 }
 
+reg_t processor_t::size()
+{
+  return PGSIZE;
+}
+
 void processor_t::trigger_updated(const std::vector<triggers::trigger_t *> &triggers)
 {
   mmu->flush_tlb();

riscv/processor.h

@@ -341,8 +341,9 @@ public:
   void register_extension(extension_t*);
 
   // MMIO slave interface
-  bool load(reg_t addr, size_t len, uint8_t* bytes);
-  bool store(reg_t addr, size_t len, const uint8_t* bytes);
+  bool load(reg_t addr, size_t len, uint8_t* bytes) override;
+  bool store(reg_t addr, size_t len, const uint8_t* bytes) override;
+  reg_t size() override;
 
   // When true, display disassembly of each instruction that's executed.
   bool debug;