diff --git a/disasm/disasm.cc b/disasm/disasm.cc
index f7422dff..ca4a7f6d 100644
--- a/disasm/disasm.cc
+++ b/disasm/disasm.cc
@@ -1959,6 +1959,38 @@ void disassembler_t::add_instructions(const isa_parser_t* isa, bool strict)
       DISASM_OPIV__X__INSN(vdot4aus, 0);
     }
 
+    if (ext_enabled(EXT_ZVQWBDOTA8I) || ext_enabled(EXT_ZVQWBDOTA16I)) {
+      DEFINE_VECTOR_VV(vqwbdotau_vv);
+      DEFINE_VECTOR_VV(vqwbdotas_vv);
+    }
+
+    if (ext_enabled(EXT_ZVFQWBDOTA8F)) {
+      DEFINE_VECTOR_VV(vfqwbdota_vv);
+      DEFINE_VECTOR_VV(vfqwbdota_alt_vv);
+    }
+
+    if (ext_enabled(EXT_ZVFWBDOTA16BF)) {
+      DEFINE_VECTOR_VV(vfwbdota_vv);
+    }
+
+    if (ext_enabled(EXT_ZVFBDOTA32F)) {
+      DEFINE_VECTOR_VV(vfbdota_vv);
+    }
+
+    if (ext_enabled(EXT_ZVQWDOTA8I) || ext_enabled(EXT_ZVQWDOTA16I)) {
+      DEFINE_VECTOR_VV(vqwdotau_vv);
+      DEFINE_VECTOR_VV(vqwdotas_vv);
+    }
+
+    if (ext_enabled(EXT_ZVFQWDOTA8F)) {
+      DEFINE_VECTOR_VV(vfqwdota_vv);
+      DEFINE_VECTOR_VV(vfqwdota_alt_vv);
+    }
+
+    if (ext_enabled(EXT_ZVFWDOTA16BF)) {
+      DEFINE_VECTOR_VV(vfwdota_vv);
+    }
+
     #undef DISASM_OPIV_VXI_INSN
     #undef DISASM_OPIV_VX__INSN
     #undef DISASM_OPIV__XI_INSN