diff --git a/riscv/execute.h b/riscv/execute.h
index 4386742a..823697a7 100644
--- a/riscv/execute.h
+++ b/riscv/execute.h
@@ -277,6 +277,62 @@ switch((insn.bits >> 0x19) & 0x7f)
         }
         #include "insns/unimp.h"
       }
+      case 0x4:
+      {
+        if((insn.bits & 0xfe007c00) == 0xd0004000)
+        {
+          #include "insns/madd_s.h"
+          break;
+        }
+        if((insn.bits & 0xfe007c00) == 0xd0004c00)
+        {
+          #include "insns/madd_d.h"
+          break;
+        }
+        #include "insns/unimp.h"
+      }
+      case 0x5:
+      {
+        if((insn.bits & 0xfe007c00) == 0xd0005000)
+        {
+          #include "insns/msub_s.h"
+          break;
+        }
+        if((insn.bits & 0xfe007c00) == 0xd0005c00)
+        {
+          #include "insns/msub_d.h"
+          break;
+        }
+        #include "insns/unimp.h"
+      }
+      case 0x6:
+      {
+        if((insn.bits & 0xfe007c00) == 0xd0006000)
+        {
+          #include "insns/nmadd_s.h"
+          break;
+        }
+        if((insn.bits & 0xfe007c00) == 0xd0006c00)
+        {
+          #include "insns/nmadd_d.h"
+          break;
+        }
+        #include "insns/unimp.h"
+      }
+      case 0x7:
+      {
+        if((insn.bits & 0xfe007c00) == 0xd0007c00)
+        {
+          #include "insns/nmsub_d.h"
+          break;
+        }
+        if((insn.bits & 0xfe007c00) == 0xd0007000)
+        {
+          #include "insns/nmsub_s.h"
+          break;
+        }
+        #include "insns/unimp.h"
+      }
       default:
       {
         #include "insns/unimp.h"
diff --git a/riscv/insns/madd_d.h b/riscv/insns/madd_d.h
new file mode 100644
index 00000000..e1b92060
--- /dev/null
+++ b/riscv/insns/madd_d.h
@@ -0,0 +1,3 @@
+require_fp;
+FRC = f64_mulAdd(FRA, FRB, FRD);
+set_fp_exceptions;
diff --git a/riscv/insns/madd_s.h b/riscv/insns/madd_s.h
new file mode 100644
index 00000000..3433adfe
--- /dev/null
+++ b/riscv/insns/madd_s.h
@@ -0,0 +1,3 @@
+require_fp;
+FRC = f32_mulAdd(FRA, FRB, FRD);
+set_fp_exceptions;
diff --git a/riscv/insns/msub_d.h b/riscv/insns/msub_d.h
new file mode 100644
index 00000000..a35dc198
--- /dev/null
+++ b/riscv/insns/msub_d.h
@@ -0,0 +1,3 @@
+require_fp;
+FRC = f64_mulAdd(FRA, FRB, FRD ^ (uint32_t)INT64_MIN);
+set_fp_exceptions;
diff --git a/riscv/insns/msub_s.h b/riscv/insns/msub_s.h
new file mode 100644
index 00000000..60f10a4d
--- /dev/null
+++ b/riscv/insns/msub_s.h
@@ -0,0 +1,3 @@
+require_fp;
+FRC = f32_mulAdd(FRA, FRB, FRD ^ (uint32_t)INT32_MIN);
+set_fp_exceptions;
diff --git a/riscv/insns/nmadd_d.h b/riscv/insns/nmadd_d.h
new file mode 100644
index 00000000..73ab2bf0
--- /dev/null
+++ b/riscv/insns/nmadd_d.h
@@ -0,0 +1,3 @@
+require_fp;
+FRC = f64_mulAdd(FRA, FRB, FRD) ^ (uint64_t)INT64_MIN;
+set_fp_exceptions;
diff --git a/riscv/insns/nmadd_s.h b/riscv/insns/nmadd_s.h
new file mode 100644
index 00000000..c0603555
--- /dev/null
+++ b/riscv/insns/nmadd_s.h
@@ -0,0 +1,3 @@
+require_fp;
+FRC = f32_mulAdd(FRA, FRB, FRD) ^ (uint32_t)INT32_MIN;
+set_fp_exceptions;
diff --git a/riscv/insns/nmsub_d.h b/riscv/insns/nmsub_d.h
new file mode 100644
index 00000000..0c06f476
--- /dev/null
+++ b/riscv/insns/nmsub_d.h
@@ -0,0 +1,3 @@
+require_fp;
+FRC = f64_mulAdd(FRA, FRB, FRD ^ (uint64_t)INT64_MIN) ^ (uint64_t)INT64_MIN;
+set_fp_exceptions;
diff --git a/riscv/insns/nmsub_s.h b/riscv/insns/nmsub_s.h
new file mode 100644
index 00000000..d9fe1095
--- /dev/null
+++ b/riscv/insns/nmsub_s.h
@@ -0,0 +1,3 @@
+require_fp;
+FRC = f32_mulAdd(FRA, FRB, FRD ^ (uint32_t)INT32_MIN) ^ (uint32_t)INT32_MIN;
+set_fp_exceptions;