|
|
@ -150,10 +150,12 @@ |
|
|
#define MASK_AMOMAX_D 0xf800707f |
|
|
#define MASK_AMOMAX_D 0xf800707f |
|
|
#define MATCH_BLTU 0x6063 |
|
|
#define MATCH_BLTU 0x6063 |
|
|
#define MASK_BLTU 0x707f |
|
|
#define MASK_BLTU 0x707f |
|
|
|
|
|
#define MATCH_FCLASS_S 0xe0001053 |
|
|
|
|
|
#define MASK_FCLASS_S 0xfff0707f |
|
|
#define MATCH_FSGNJN_D 0x22001053 |
|
|
#define MATCH_FSGNJN_D 0x22001053 |
|
|
#define MASK_FSGNJN_D 0xfe00707f |
|
|
#define MASK_FSGNJN_D 0xfe00707f |
|
|
#define MATCH_FMIN_S 0x28000053 |
|
|
#define MATCH_HCALL 0x10000073 |
|
|
#define MASK_FMIN_S 0xfe00707f |
|
|
#define MASK_HCALL 0xffffffff |
|
|
#define MATCH_MRET 0x30200073 |
|
|
#define MATCH_MRET 0x30200073 |
|
|
#define MASK_MRET 0xffffffff |
|
|
#define MASK_MRET 0xffffffff |
|
|
#define MATCH_CSRRW 0x1073 |
|
|
#define MATCH_CSRRW 0x1073 |
|
|
@ -242,8 +244,8 @@ |
|
|
#define MASK_BLT 0x707f |
|
|
#define MASK_BLT 0x707f |
|
|
#define MATCH_SCALL 0x73 |
|
|
#define MATCH_SCALL 0x73 |
|
|
#define MASK_SCALL 0xffffffff |
|
|
#define MASK_SCALL 0xffffffff |
|
|
#define MATCH_FCLASS_S 0xe0001053 |
|
|
#define MATCH_FMIN_S 0x28000053 |
|
|
#define MASK_FCLASS_S 0xfff0707f |
|
|
#define MASK_FMIN_S 0xfe00707f |
|
|
#define MATCH_SFENCE_VM 0x10400073 |
|
|
#define MATCH_SFENCE_VM 0x10400073 |
|
|
#define MASK_SFENCE_VM 0xfff07fff |
|
|
#define MASK_SFENCE_VM 0xfff07fff |
|
|
#define MATCH_SC_W 0x1800202f |
|
|
#define MATCH_SC_W 0x1800202f |
|
|
@ -530,8 +532,9 @@ DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW) |
|
|
DECLARE_INSN(fmin_d, MATCH_FMIN_D, MASK_FMIN_D) |
|
|
DECLARE_INSN(fmin_d, MATCH_FMIN_D, MASK_FMIN_D) |
|
|
DECLARE_INSN(amomax_d, MATCH_AMOMAX_D, MASK_AMOMAX_D) |
|
|
DECLARE_INSN(amomax_d, MATCH_AMOMAX_D, MASK_AMOMAX_D) |
|
|
DECLARE_INSN(bltu, MATCH_BLTU, MASK_BLTU) |
|
|
DECLARE_INSN(bltu, MATCH_BLTU, MASK_BLTU) |
|
|
|
|
|
DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S) |
|
|
DECLARE_INSN(fsgnjn_d, MATCH_FSGNJN_D, MASK_FSGNJN_D) |
|
|
DECLARE_INSN(fsgnjn_d, MATCH_FSGNJN_D, MASK_FSGNJN_D) |
|
|
DECLARE_INSN(fmin_s, MATCH_FMIN_S, MASK_FMIN_S) |
|
|
DECLARE_INSN(hcall, MATCH_HCALL, MASK_HCALL) |
|
|
DECLARE_INSN(mret, MATCH_MRET, MASK_MRET) |
|
|
DECLARE_INSN(mret, MATCH_MRET, MASK_MRET) |
|
|
DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW) |
|
|
DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW) |
|
|
DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW) |
|
|
DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW) |
|
|
@ -576,7 +579,7 @@ DECLARE_INSN(xor, MATCH_XOR, MASK_XOR) |
|
|
DECLARE_INSN(sub, MATCH_SUB, MASK_SUB) |
|
|
DECLARE_INSN(sub, MATCH_SUB, MASK_SUB) |
|
|
DECLARE_INSN(blt, MATCH_BLT, MASK_BLT) |
|
|
DECLARE_INSN(blt, MATCH_BLT, MASK_BLT) |
|
|
DECLARE_INSN(scall, MATCH_SCALL, MASK_SCALL) |
|
|
DECLARE_INSN(scall, MATCH_SCALL, MASK_SCALL) |
|
|
DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S) |
|
|
DECLARE_INSN(fmin_s, MATCH_FMIN_S, MASK_FMIN_S) |
|
|
DECLARE_INSN(sfence_vm, MATCH_SFENCE_VM, MASK_SFENCE_VM) |
|
|
DECLARE_INSN(sfence_vm, MATCH_SFENCE_VM, MASK_SFENCE_VM) |
|
|
DECLARE_INSN(sc_w, MATCH_SC_W, MASK_SC_W) |
|
|
DECLARE_INSN(sc_w, MATCH_SC_W, MASK_SC_W) |
|
|
DECLARE_INSN(rem, MATCH_REM, MASK_REM) |
|
|
DECLARE_INSN(rem, MATCH_REM, MASK_REM) |
|
|
|