Browse Source

rvp: add missing vxsat updating

Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
pull/2310/head
Chih-Min Chao 2 months ago
parent
commit
36c40b4853
  1. 4
      riscv/insns/psadd_b.h
  2. 4
      riscv/insns/psadd_db.h
  3. 4
      riscv/insns/psadd_dh.h
  4. 4
      riscv/insns/psadd_dw.h
  5. 4
      riscv/insns/psadd_h.h
  6. 2
      riscv/insns/psadd_w.h
  7. 4
      riscv/insns/psaddu_b.h
  8. 4
      riscv/insns/psaddu_db.h
  9. 4
      riscv/insns/psaddu_dh.h
  10. 4
      riscv/insns/psaddu_dw.h
  11. 4
      riscv/insns/psaddu_h.h
  12. 2
      riscv/insns/psaddu_w.h
  13. 4
      riscv/insns/pssub_b.h
  14. 4
      riscv/insns/pssub_db.h
  15. 4
      riscv/insns/pssub_dh.h
  16. 4
      riscv/insns/pssub_dw.h
  17. 4
      riscv/insns/pssub_h.h
  18. 2
      riscv/insns/pssub_w.h
  19. 4
      riscv/insns/pssubu_b.h
  20. 4
      riscv/insns/pssubu_db.h
  21. 4
      riscv/insns/pssubu_dh.h
  22. 4
      riscv/insns/pssubu_dw.h
  23. 4
      riscv/insns/pssubu_h.h
  24. 2
      riscv/insns/pssubu_w.h
  25. 1
      riscv/insns/saddu.h
  26. 4
      riscv/insns/ssub.h
  27. 5
      riscv/insns/ssubu.h

4
riscv/insns/psadd_b.h

@ -1,4 +1,6 @@
P_RD_RS1_RS2_LOOP(8,8,8, {
bool sat = false;
p_rd = (sat_add<int8_t, uint8_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

4
riscv/insns/psadd_db.h

@ -2,4 +2,6 @@ require_rv32;
P_RD_RS1_RS2_DW_LOOP(8,8,8, {
bool sat = false;
p_rd = (sat_add<int8_t, uint8_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

4
riscv/insns/psadd_dh.h

@ -2,4 +2,6 @@ require_rv32;
P_RD_RS1_RS2_DW_LOOP(16,16,16, {
bool sat = false;
p_rd = (sat_add<int16_t, uint16_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

4
riscv/insns/psadd_dw.h

@ -2,4 +2,6 @@ require_rv32;
P_RD_RS1_RS2_DW_LOOP(32,32,32, {
bool sat = false;
p_rd = (sat_add<int32_t, uint32_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

4
riscv/insns/psadd_h.h

@ -1,4 +1,6 @@
P_RD_RS1_RS2_LOOP(16,16,16, {
bool sat = false;
p_rd = (sat_add<int16_t, uint16_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

2
riscv/insns/psadd_w.h

@ -2,5 +2,7 @@ require_rv64;
P_RD_RS1_RS2_LOOP(32,32,32, {
bool sat = false;
p_rd = (sat_add<int32_t, uint32_t>(p_rs1, p_rs2, sat));
if (sat)
P.set_vxsat();
}
)

4
riscv/insns/psaddu_b.h

@ -1,4 +1,6 @@
P_RD_RS1_RS2_ULOOP(8,8,8, {
bool sat = false;
p_rd = (sat_addu<uint8_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

4
riscv/insns/psaddu_db.h

@ -2,4 +2,6 @@ require_rv32;
P_RD_RS1_RS2_DW_ULOOP(8,8,8, {
bool sat = false;
p_rd = (sat_addu<uint8_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

4
riscv/insns/psaddu_dh.h

@ -2,4 +2,6 @@ require_rv32;
P_RD_RS1_RS2_DW_ULOOP(16,16,16, {
bool sat = false;
p_rd = (sat_addu<uint16_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

4
riscv/insns/psaddu_dw.h

@ -2,4 +2,6 @@ require_rv32;
P_RD_RS1_RS2_DW_ULOOP(32,32,32, {
bool sat = false;
p_rd = (sat_addu<uint32_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

4
riscv/insns/psaddu_h.h

@ -1,4 +1,6 @@
P_RD_RS1_RS2_ULOOP(16,16,16, {
bool sat = false;
p_rd = (sat_addu<uint16_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

2
riscv/insns/psaddu_w.h

@ -2,5 +2,7 @@ require_rv64;
P_RD_RS1_RS2_ULOOP(32,32,32, {
bool sat = false;
p_rd = (sat_addu<uint32_t>(p_rs1, p_rs2, sat));
if (sat)
P.set_vxsat();
}
)

4
riscv/insns/pssub_b.h

@ -1,4 +1,6 @@
P_RD_RS1_RS2_LOOP(8,8,8, {
bool sat = false;
p_rd = (sat_sub<int8_t, uint8_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

4
riscv/insns/pssub_db.h

@ -2,4 +2,6 @@ require_rv32;
P_RD_RS1_RS2_DW_LOOP(8,8,8, {
bool sat = false;
p_rd = (sat_sub<int8_t, uint8_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

4
riscv/insns/pssub_dh.h

@ -2,4 +2,6 @@ require_rv32;
P_RD_RS1_RS2_DW_LOOP(16,16,16, {
bool sat = false;
p_rd = (sat_sub<int16_t, uint16_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

4
riscv/insns/pssub_dw.h

@ -2,4 +2,6 @@ require_rv32;
P_RD_RS1_RS2_DW_LOOP(32,32,32, {
bool sat = false;
p_rd = (sat_sub<int32_t, uint32_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

4
riscv/insns/pssub_h.h

@ -1,4 +1,6 @@
P_RD_RS1_RS2_LOOP(16,16,16, {
bool sat = false;
p_rd = (sat_sub<int16_t, uint16_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

2
riscv/insns/pssub_w.h

@ -2,5 +2,7 @@ require_rv64;
P_RD_RS1_RS2_LOOP(32,32,32, {
bool sat = false;
p_rd = (sat_sub<int32_t, uint32_t>(p_rs1, p_rs2, sat));
if (sat)
P.set_vxsat();
}
)

4
riscv/insns/pssubu_b.h

@ -1,4 +1,6 @@
P_RD_RS1_RS2_ULOOP(8,8,8, {
bool sat = false;
p_rd = (sat_subu<uint8_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

4
riscv/insns/pssubu_db.h

@ -2,4 +2,6 @@ require_rv32;
P_RD_RS1_RS2_DW_ULOOP(8,8,8, {
bool sat = false;
p_rd = (sat_subu<uint8_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

4
riscv/insns/pssubu_dh.h

@ -2,4 +2,6 @@ require_rv32;
P_RD_RS1_RS2_DW_ULOOP(16,16,16, {
bool sat = false;
p_rd = (sat_subu<uint16_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

4
riscv/insns/pssubu_dw.h

@ -2,4 +2,6 @@ require_rv32;
P_RD_RS1_RS2_DW_ULOOP(32,32,32, {
bool sat = false;
p_rd = (sat_subu<uint32_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

4
riscv/insns/pssubu_h.h

@ -1,4 +1,6 @@
P_RD_RS1_RS2_ULOOP(16,16,16, {
bool sat = false;
p_rd = (sat_subu<uint16_t>(p_rs1, p_rs2, sat));
})
if (sat)
P.set_vxsat();
})

2
riscv/insns/pssubu_w.h

@ -2,5 +2,7 @@ require_rv64;
P_RD_RS1_RS2_ULOOP(32,32,32, {
bool sat = false;
p_rd = (sat_subu<uint32_t>(p_rs1, p_rs2, sat));
if (sat)
P.set_vxsat();
}
)

1
riscv/insns/saddu.h

@ -4,4 +4,5 @@ bool sat = false;
reg_t tmp = sat_addu<uint32_t>(RS1, RS2, sat);
if (sat)
P.set_vxsat();
WRITE_RD(sext32(tmp));

4
riscv/insns/ssub.h

@ -2,4 +2,6 @@ require_extension('P');
require_rv32;
bool sat = false;
int32_t p_rd = sat_sub<int32_t, uint32_t>(RS1, RS2, sat);
WRITE_RD(p_rd);
if (sat)
P.set_vxsat();
WRITE_RD(sext32(p_rd));

5
riscv/insns/ssubu.h

@ -1,4 +1,7 @@
require_extension('P');
require_rv32;
bool sat = false;
WRITE_RD(sat_subu<uint32_t>(RS1, RS2, sat));
uint32_t p_rd = sat_subu<uint32_t>(RS1, RS2, sat);
if (sat)
P.set_vxsat();
WRITE_RD(sext32(p_rd));

Loading…
Cancel
Save