Convert vxsat to csr_t

Adds commit log events for vxsat to many vector instructions.

riscv/csrs.cc

@@ -1185,3 +1185,23 @@ bool sentropy_csr_t::unlogged_write(const reg_t val) noexcept {
   proc->es.set_sentropy(val);
   return true;
 }
+
+
+
+vector_csr_t::vector_csr_t(processor_t* const proc, const reg_t addr, const reg_t mask):
+  basic_csr_t(proc, addr, 0),
+  mask(mask) {
+}
+
+void vector_csr_t::verify_permissions(insn_t insn, bool write) const {
+  require_vector_vs;
+  if (!proc->extension_enabled('V'))
+    throw trap_illegal_instruction(insn.bits());
+  basic_csr_t::verify_permissions(insn, write);
+}
+
+bool vector_csr_t::unlogged_write(const reg_t val) noexcept {
+  if (mask == 0) return false;
+  dirty_vs_state;
+  return basic_csr_t::unlogged_write(val & mask);
+}

riscv/csrs.h

@@ -614,4 +614,15 @@ class sentropy_csr_t: public csr_t {
 };
 
 
+class vector_csr_t: public basic_csr_t {
+ public:
+  vector_csr_t(processor_t* const proc, const reg_t addr, const reg_t mask);
+  virtual void verify_permissions(insn_t insn, bool write) const override;
+ protected:
+  virtual bool unlogged_write(const reg_t val) noexcept override;
+ private:
+  reg_t mask;
+};
+
+
 #endif

riscv/decode.h

@@ -2347,7 +2347,7 @@ for (reg_t i = 0; i < P.VU.vlmax && P.VU.vl != 0; ++i) { \
   }
 
 #define P_SET_OV(ov) \
-  P.VU.vxsat |= ov;
+  P.VU.vxsat->write(P.VU.vxsat->read() | ov);
 
 #define P_SAT(R, BIT) \
   if (R > INT##BIT##_MAX) { \

riscv/processor.cc

@@ -552,6 +552,9 @@ void processor_t::vectorUnit_t::reset(){
   reg_file = malloc(NVPR * vlenb);
   memset(reg_file, 0, NVPR * vlenb);
 
+  auto& csrmap = p->get_state()->csrmap;
+  csrmap[CSR_VXSAT] = vxsat = std::make_shared<vector_csr_t>(p, CSR_VXSAT, /*mask*/ 0x1ul);
+
   vtype = 0;
   set_vl(0, 0, 0, -1); // default to illegal configuration
 }
@@ -986,17 +989,13 @@ void processor_t::set_csr(int which, reg_t val)
   {
     case CSR_VCSR:
       dirty_vs_state;
-      VU.vxsat = (val & VCSR_VXSAT) >> VCSR_VXSAT_SHIFT;
+      VU.vxsat->write((val & VCSR_VXSAT) >> VCSR_VXSAT_SHIFT);
       VU.vxrm = (val & VCSR_VXRM) >> VCSR_VXRM_SHIFT;
       break;
     case CSR_VSTART:
       dirty_vs_state;
       VU.vstart = val & (VU.get_vlen() - 1);
       break;
-    case CSR_VXSAT:
-      dirty_vs_state;
-      VU.vxsat = val & 0x1ul;
-      break;
     case CSR_VXRM:
       dirty_vs_state;
       VU.vxrm = val & 0x3ul;
@@ -1007,16 +1006,12 @@ void processor_t::set_csr(int which, reg_t val)
   switch (which)
   {
     case CSR_VCSR:
-      LOG_CSR(CSR_VXSAT);
       LOG_CSR(CSR_VXRM);
       break;
 
     case CSR_VSTART:
       LOG_CSR(CSR_VSTART);
       break;
-    case CSR_VXSAT:
-      LOG_CSR(CSR_VXSAT);
-      break;
     case CSR_VXRM:
       LOG_CSR(CSR_VXRM);
       break;
@@ -1048,17 +1043,12 @@ reg_t processor_t::get_csr(int which, insn_t insn, bool write, bool peek)
       require_vector_vs;
       if (!extension_enabled('V'))
         break;
-      ret((VU.vxsat << VCSR_VXSAT_SHIFT) | (VU.vxrm << VCSR_VXRM_SHIFT));
+      ret((VU.vxsat->read() << VCSR_VXSAT_SHIFT) | (VU.vxrm << VCSR_VXRM_SHIFT));
     case CSR_VSTART:
       require_vector_vs;
       if (!extension_enabled('V'))
         break;
       ret(VU.vstart);
-    case CSR_VXSAT:
-      require_vector_vs;
-      if (!extension_enabled('V'))
-        break;
-      ret(VU.vxsat);
     case CSR_VXRM:
       require_vector_vs;
       if (!extension_enabled('V'))

riscv/processor.h

@@ -511,7 +511,8 @@ public:
       char reg_referenced[NVPR];
       int setvl_count;
       reg_t vlmax;
-      reg_t vstart, vxrm, vxsat, vl, vtype, vlenb;
+      reg_t vstart, vxrm, vl, vtype, vlenb;
+      csr_t_p vxsat;
       reg_t vma, vta;
       reg_t vsew;
       float vflmul;
@@ -554,10 +555,10 @@ public:
         vlmax(0),
         vstart(0),
         vxrm(0),
-        vxsat(0),
         vl(0),
         vtype(0),
         vlenb(0),
+        vxsat(0),
         vma(0),
         vta(0),
         vsew(0),