Francesco Scappatura
1 month ago
22 changed files with 835 additions and 10 deletions
@ -0,0 +1,99 @@ |
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#include "led-device.h" |
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#include <cstring> |
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#include <cstdio> |
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#include <sstream> |
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#include <algorithm> |
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led_device_t::led_device_t(const sim_t *sim, reg_t base, size_t size, uint32_t num_leds) |
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: sim(sim), base_addr(base), dev_size(size), |
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num_leds(std::min(num_leds, 32u)), led_state(0) { |
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printf("LED device init at 0x%lx, size: 0x%lx, num_leds: %u\n", |
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base_addr, dev_size, this->num_leds); |
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} |
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bool led_device_t::load(reg_t addr, size_t len, uint8_t* bytes) { |
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printf("led_device_t::load from address: 0x%lx, length: %zu\n", |
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base_addr + addr, len); |
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if (addr == 0 && len == 4) { |
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uint32_t masked_state = led_state & ((1u << num_leds) - 1); |
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memcpy(bytes, &masked_state, 4); |
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return true; |
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} |
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return false; |
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} |
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bool led_device_t::store(reg_t addr, size_t len, const uint8_t* bytes) { |
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printf("led_device_t::store to address: 0x%lx, length: %zu\n", |
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base_addr + addr, len); |
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if (addr == 0 && len == 4) { |
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uint32_t new_state; |
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memcpy(&new_state, bytes, 4); |
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led_state = new_state & ((1u << num_leds) - 1); |
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printf("LED state changed to: 0x%x\n", led_state); |
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printf("LED pattern (%u LEDs): ", num_leds); |
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for (int i = num_leds - 1; i >= 0; i--) { |
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printf("%c", (led_state & (1 << i)) ? ' ' : '-'); |
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} |
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printf(" (0x%x)\n", led_state); |
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return true; |
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} |
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return false; |
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} |
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size_t led_device_t::size() { |
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return dev_size; |
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} |
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led_device_t* led_parse_from_fdt(const void *fdt, const sim_t *sim, |
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reg_t *base, std::vector<std::string> args) { |
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if (args.size() < 3) { |
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fprintf(stderr, "Error: led device requires 3 arguments (base, size, num_leds)\n"); |
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return nullptr; |
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} |
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try { |
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*base = std::stoull(args[0], nullptr, 0); |
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reg_t size = std::stoull(args[1], nullptr, 0); |
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uint32_t num_leds = std::stoul(args[2], nullptr, 0); |
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if (num_leds == 0 || num_leds > 32) { |
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fprintf(stderr, "Error: num_leds must be between 1 and 32, got %u\n", num_leds); |
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return nullptr; |
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} |
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return new led_device_t(sim, *base, size, num_leds); |
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} catch (const std::exception& e) { |
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fprintf(stderr, "Error parsing LED device params: %s\n", e.what()); |
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return nullptr; |
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} |
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} |
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std::string led_generate_dts(const sim_t *sim, const std::vector<std::string> &args) { |
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std::ostringstream s; |
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reg_t base = 0x10001000; |
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reg_t size = 0x1000; |
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uint32_t num_leds = 8; |
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if (args.size() >= 3) { |
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base = std::stoull(args[0], nullptr, 0); |
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size = std::stoull(args[1], nullptr, 0); |
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num_leds = std::stoul(args[2], nullptr, 0); |
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} |
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s << std::hex |
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<< " led@" << base << " {\n" |
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<< " compatible = \"led\";\n" |
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<< " reg = <0x0 0x" << base << " 0x0 0x" << size << ">;\n" |
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<< std::dec |
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<< " num-leds = <" << num_leds << ">;\n" |
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<< std::hex |
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<< " spike,plugin-params = \"0x" << base << ",0x" << size << "," << std::dec << num_leds << "\";\n" |
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<< " };\n"; |
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return s.str(); |
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} |
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REGISTER_DEVICE(led_device, led_parse_from_fdt, led_generate_dts) |
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@ -0,0 +1,26 @@ |
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#ifndef LED_DEVICE_H |
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#define LED_DEVICE_H |
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#include <riscv/sim.h> |
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#include <vector> |
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#include <string> |
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class led_device_t : public abstract_device_t { |
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public: |
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led_device_t(const sim_t *sim, reg_t base, size_t size, uint32_t num_leds); |
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bool load(reg_t addr, size_t len, uint8_t* bytes) override; |
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bool store(reg_t addr, size_t len, const uint8_t* bytes) override; |
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size_t size() override; |
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private: |
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const sim_t *sim; |
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reg_t base_addr; |
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size_t dev_size; |
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uint32_t num_leds; |
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uint32_t led_state; |
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}; |
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#endif // LED_DEVICE_H
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@ -0,0 +1,52 @@ |
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/dts-v1/; |
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/ { |
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#address-cells = <2>; |
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#size-cells = <2>; |
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cpus { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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timebase-frequency = <10000000>; |
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CPU0: cpu@0 { |
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device_type = "cpu"; |
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reg = <0>; |
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riscv,isa = "rv64imafdc"; |
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CPU0_intc: interrupt-controller { |
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#interrupt-cells = <1>; |
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interrupt-controller; |
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compatible = "riscv,cpu-intc"; |
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}; |
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}; |
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}; |
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memory@90000000 { |
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device_type = "memory"; |
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reg = <0x00000000 0x90000000 0x00000000 0x10000000>; |
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}; |
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clint@2000000 { |
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compatible = "riscv,clint0"; |
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reg = <0x0 0x2000000 0x0 0xc0000>; |
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}; |
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PLIC: plic@c000000 { |
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compatible = "riscv,plic0"; |
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reg = <0x0 0xc000000 0x0 0x1000000>; |
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riscv,ndev = <0x1f>; |
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riscv,max-priority = <0xf>; |
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#interrupt-cells = <1>; |
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interrupt-controller; |
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}; |
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uart0: serial@10000000 { |
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compatible = "ns16550a"; |
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reg = <0x0 0x10000000 0x0 0x100>; |
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clock-frequency = <10000000>; |
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interrupts = <10>; |
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reg-shift = <0>; |
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reg-io-width = <1>; |
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}; |
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}; |
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@ -0,0 +1,36 @@ |
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/dts-v1/; |
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/ { |
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#address-cells = <2>; |
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#size-cells = <2>; |
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cpus { // Container for all CPU cores |
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#address-cells = <1>; // CPU children use 1 cell for hartid |
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#size-cells = <0>; // CPU children don't specify size |
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timebase-frequency = <10000000>; // Timer ticks at 10 MHz (for OS timing) |
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CPU0: cpu@0 { // First CPU core (label: CPU0, unit address: 0) |
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device_type = "cpu"; // Identifies this as a CPU device |
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reg = <0>; // Hartid = 0 (hardware thread ID) |
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riscv,isa = "rv64imafdc"; // ISA: RV64 with I,M,A,F,D,C extensions |
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}; |
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}; |
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memory@90000000 { |
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device_type = "memory"; |
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reg = <0x0 0x90000000 0x0 0x00010000>; |
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}; |
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led1@10001000 { |
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compatible = "led_device"; |
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reg = <0x0 0x10001000 0x0 0x1000>; |
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spike,plugin-params = "16"; |
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}; |
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led2@10002000 { |
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compatible = "led_device"; |
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reg = <0x0 0x10002000 0x0 0x1000>; |
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spike,plugin-params = "8"; |
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}; |
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}; |
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@ -0,0 +1,26 @@ |
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/dts-v1/; |
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/ { |
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#address-cells = <2>; |
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#size-cells = <2>; |
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cpus { // Container for all CPU cores |
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#address-cells = <1>; // CPU children use 1 cell for hartid |
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#size-cells = <0>; // CPU children don't specify size |
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timebase-frequency = <10000000>; // Timer ticks at 10 MHz (for OS timing) |
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CPU0: cpu@0 { // First CPU core (label: CPU0, unit address: 0) |
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device_type = "cpu"; // Identifies this as a CPU device |
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reg = <0>; // Hartid = 0 (hardware thread ID) |
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riscv,isa = "rv64imafdc"; // ISA: RV64 with I,M,A,F,D,C extensions |
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}; |
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}; |
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led@10001000 { |
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compatible = "led_device"; |
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reg = <0x0 0x10001000 0x0 0x00001000>; |
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spike,plugin-params = "16"; |
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}; |
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}; |
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@ -0,0 +1,23 @@ |
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/dts-v1/; |
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/ { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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cpus { // Container for all CPU cores |
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#address-cells = <1>; // CPU children use 1 cell for hartid |
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#size-cells = <0>; // CPU children don't specify size |
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timebase-frequency = <10000000>; // Timer ticks at 10 MHz (for OS timing) |
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CPU0: cpu@0 { // First CPU core (label: CPU0, unit address: 0) |
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device_type = "cpu"; // Identifies this as a CPU device |
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reg = <0>; // Hartid = 0 (hardware thread ID) |
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riscv,isa = "rv64imafdc"; // ISA: RV64 with I,M,A,F,D,C extensions |
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}; |
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}; |
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memory@80000000 { |
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device_type = "memory"; |
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reg = <0x80000000 0x10000000>; // 256MB |
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}; |
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}; |
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@ -0,0 +1,24 @@ |
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/dts-v1/; |
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/ { |
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#address-cells = <2>; |
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#size-cells = <2>; |
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cpus { // Container for all CPU cores |
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#address-cells = <1>; // CPU children use 1 cell for hartid |
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#size-cells = <0>; // CPU children don't specify size |
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timebase-frequency = <10000000>; // Timer ticks at 10 MHz (for OS timing) |
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CPU0: cpu@0 { // First CPU core (label: CPU0, unit address: 0) |
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device_type = "cpu"; // Identifies this as a CPU device |
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reg = <0>; // Hartid = 0 (hardware thread ID) |
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riscv,isa = "rv64imafdc"; // ISA: RV64 with I,M,A,F,D,C extensions |
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}; |
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}; |
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memory@80000000 { |
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device_type = "memory"; |
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reg = <0x0 0x20000000 0x0 0x40000000>; // 1GB |
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}; |
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}; |
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@ -0,0 +1,23 @@ |
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/dts-v1/; |
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/ { |
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#address-cells = <2>; |
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#size-cells = <1>; |
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cpus { // Container for all CPU cores |
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#address-cells = <1>; // CPU children use 1 cell for hartid |
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#size-cells = <0>; // CPU children don't specify size |
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timebase-frequency = <10000000>; // Timer ticks at 10 MHz (for OS timing) |
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CPU0: cpu@0 { // First CPU core (label: CPU0, unit address: 0) |
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device_type = "cpu"; // Identifies this as a CPU device |
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reg = <0>; // Hartid = 0 (hardware thread ID) |
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riscv,isa = "rv64imafdc"; // ISA: RV64 with I,M,A,F,D,C extensions |
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}; |
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}; |
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memory@100000000 { |
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device_type = "memory"; |
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reg = <0x1 0x00000000 0x20000000>; // 512MB at 4GB |
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}; |
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}; |
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@ -0,0 +1,28 @@ |
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/dts-v1/; |
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/ { |
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#address-cells = <2>; |
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#size-cells = <2>; |
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cpus { // Container for all CPU cores |
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#address-cells = <1>; // CPU children use 1 cell for hartid |
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#size-cells = <0>; // CPU children don't specify size |
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timebase-frequency = <10000000>; // Timer ticks at 10 MHz (for OS timing) |
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CPU0: cpu@0 { // First CPU core (label: CPU0, unit address: 0) |
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device_type = "cpu"; // Identifies this as a CPU device |
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reg = <0>; // Hartid = 0 (hardware thread ID) |
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riscv,isa = "rv64imafdc"; // ISA: RV64 with I,M,A,F,D,C extensions |
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}; |
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}; |
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memory@80000000 { |
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device_type = "memory"; |
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reg = <0x0 0x80000000 0x0 0x20000000>; |
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}; |
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memory@A0000000 { |
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device_type = "memory"; |
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reg = <0x0 0xA0000000 0x0 0x20000000>; |
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}; |
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}; |
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@ -0,0 +1,263 @@ |
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#include <riscv/sim.h> |
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#include <riscv/dtb_discovery.h> |
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#include <riscv/devices.h> |
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#include <riscv/mmu.h> |
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#include <fdt/libfdt.h> |
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#include <fstream> |
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#include <iostream> |
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#include <map> |
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#include <vector> |
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#include <string> |
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#include <filesystem> |
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#include <cstring> |
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#include <dlfcn.h> |
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#include "led-device.h" |
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struct expected_mem_t { |
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reg_t base; |
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}; |
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struct expected_device_t { |
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const std::type_info* compatible; |
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reg_t base; |
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}; |
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struct test_case_t { |
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std::vector<expected_mem_t> memory; |
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std::vector<expected_device_t> devices; |
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}; |
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// Key: pair of (filename, dtb_discovery_enabled)
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using test_key_t = std::pair<std::string, bool>; |
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static std::map<test_key_t, test_case_t> test_cases_expected_results = { |
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// With DTB discovery enabled
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{ {"mem-64bit-single.dtb", true}, { |
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{{0x20000000ULL}}, |
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{{&typeid(debug_module_t), 0x0ULL}} |
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}}, |
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{ {"mem-64bit-single.dtb", false}, { |
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{}, |
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{{&typeid(debug_module_t), 0x0ULL}} |
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}}, |
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{ {"mem-32bit.dtb", true}, { |
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{{0x80000000ULL}}, |
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{{&typeid(debug_module_t), 0x0ULL}} |
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}}, |
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{ {"mem-32bit.dtb", false}, { |
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{}, |
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{{&typeid(debug_module_t), 0x0ULL}} |
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}}, |
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{ {"mem-multiple-nodes.dtb", true}, { |
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{{0x80000000ULL}, {0xA0000000ULL}}, |
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{{&typeid(debug_module_t), 0x0ULL}} |
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}}, |
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{ {"mem-multiple-nodes.dtb", false}, { |
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{}, |
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{{&typeid(debug_module_t), 0x0ULL}} |
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}}, |
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{ {"mem-mixed-cells-sizes.dtb", true}, { |
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{{0x100000000ULL}}, |
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{{&typeid(debug_module_t), 0x0ULL}} |
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}}, |
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{ {"mem-mixed-cells-sizes.dtb", false}, { |
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{}, |
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{{&typeid(debug_module_t), 0x0ULL}} |
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}}, |
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{ {"devices-single-led.dtb", true}, { |
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{}, |
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{{&typeid(debug_module_t), 0x0ULL}, |
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{&typeid(led_device_t), 0x10001000ULL}} |
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}}, |
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{ {"devices-single-led.dtb", false}, { |
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{}, |
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{{&typeid(debug_module_t), 0x0ULL}} |
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}}, |
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{ {"devices-multiple-leds.dtb", true}, { |
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{{0x90000000ULL}}, |
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{{&typeid(debug_module_t), 0x0ULL}, |
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{&typeid(led_device_t), 0x10001000ULL}, |
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{&typeid(led_device_t), 0x10002000ULL}} |
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}}, |
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{ {"devices-multiple-leds.dtb", false}, { |
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{}, |
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{{&typeid(debug_module_t), 0x0ULL}} |
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}}, |
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{ {"devices-clint-plic-uart.dtb", true}, { |
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{{0x90000000ULL}}, |
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{{&typeid(debug_module_t), 0x0ULL}, |
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{&typeid(clint_t), 0x2000000ULL}, |
||||
|
{&typeid(plic_t), 0xc000000ULL}, |
||||
|
{&typeid(ns16550_t), 0x10000000ULL}} |
||||
|
}}, |
||||
|
{ {"devices-clint-plic-uart.dtb", false}, { |
||||
|
{}, |
||||
|
{{&typeid(debug_module_t), 0x0ULL}, |
||||
|
{&typeid(clint_t), 0x2000000ULL}, |
||||
|
{&typeid(plic_t), 0xc000000ULL}, |
||||
|
{&typeid(ns16550_t), 0x10000000ULL}} |
||||
|
}} |
||||
|
}; |
||||
|
|
||||
|
bool check_memory_devices(const std::map<reg_t, abstract_device_t*>& devices, |
||||
|
const std::vector<expected_mem_t>& expected_memory) { |
||||
|
bool passed = true; |
||||
|
|
||||
|
for (const auto& mem : expected_memory) { |
||||
|
auto it = devices.find(mem.base); |
||||
|
|
||||
|
if (it == devices.end()) { |
||||
|
std::cerr << "Memory NOT found at 0x" << std::hex << mem.base << std::endl; |
||||
|
passed = false; |
||||
|
} else if (dynamic_cast<mem_t*>(it->second) == nullptr) { |
||||
|
std::cerr << "Device at 0x" << std::hex << mem.base |
||||
|
<< " is not mem_t type" << std::endl; |
||||
|
passed = false; |
||||
|
} else { |
||||
|
std::cout << "Memory found at 0x" << std::hex << mem.base << std::endl; |
||||
|
} |
||||
|
} |
||||
|
|
||||
|
return passed; |
||||
|
} |
||||
|
|
||||
|
bool check_devices(const std::map<reg_t, abstract_device_t*>& devices, |
||||
|
const std::vector<expected_device_t>& expected_devices) { |
||||
|
bool passed = true; |
||||
|
|
||||
|
for (const auto& expected_device : expected_devices) { |
||||
|
auto it = devices.find(expected_device.base); |
||||
|
|
||||
|
if (it == devices.end()) { |
||||
|
std::cerr << "Expected device not found at 0x" << std::hex << expected_device.base << std::endl; |
||||
|
passed = false; |
||||
|
continue; |
||||
|
} |
||||
|
|
||||
|
const std::type_info& actual_type = typeid(*it->second); |
||||
|
|
||||
|
if (*expected_device.compatible != actual_type) { |
||||
|
std::cerr << "Device at 0x" << std::hex << expected_device.base |
||||
|
<< " has wrong type. Expected: " << expected_device.compatible->name() |
||||
|
<< ", Got: " << actual_type.name() << std::endl; |
||||
|
passed = false; |
||||
|
} else { |
||||
|
std::cout << "Expected device found at 0x" << std::hex << expected_device.base |
||||
|
<< " Type: " << actual_type.name() << std::endl; |
||||
|
} |
||||
|
} |
||||
|
|
||||
|
return passed; |
||||
|
} |
||||
|
|
||||
|
bool check_no_unexpected_devices(const std::map<reg_t, abstract_device_t*>& devices, |
||||
|
const test_case_t& expected) { |
||||
|
size_t expected_count = expected.memory.size() + expected.devices.size(); |
||||
|
|
||||
|
if (devices.size() != expected_count) { |
||||
|
std::cerr << "Device count mismatch. Expected: " << expected_count |
||||
|
<< ", Got: " << devices.size() << std::endl; |
||||
|
return false; |
||||
|
} |
||||
|
|
||||
|
return true; |
||||
|
} |
||||
|
|
||||
|
bool compare_devices(sim_t& sim, const test_case_t& expected) { |
||||
|
const auto& devices = sim.get_bus().get_devices(); |
||||
|
|
||||
|
bool no_extra_ok = check_no_unexpected_devices(devices, expected); |
||||
|
bool memory_ok = check_memory_devices(devices, expected.memory); |
||||
|
bool devices_ok= check_devices(devices, expected.devices); |
||||
|
|
||||
|
return memory_ok && devices_ok && no_extra_ok; |
||||
|
} |
||||
|
|
||||
|
bool run_test(const std::string& dtb_path, bool dtb_discovery, |
||||
|
const std::string& pk, const std::string& executable) { |
||||
|
// Extract filename from dtb path
|
||||
|
std::filesystem::path p(dtb_path); |
||||
|
std::string dtb_filename = p.filename().string(); |
||||
|
|
||||
|
// Create test key
|
||||
|
test_key_t test_key = {dtb_filename, dtb_discovery}; |
||||
|
|
||||
|
// Find expected layout
|
||||
|
auto test_it = test_cases_expected_results.find(test_key); |
||||
|
if (test_it == test_cases_expected_results.end()) { |
||||
|
std::cout << "Error: No expected result for '" << dtb_filename |
||||
|
<< "' with dtb_discovery=" << (dtb_discovery ? "true" : "false") << "\n"; |
||||
|
return false; |
||||
|
} |
||||
|
|
||||
|
const auto& expected = test_it->second; |
||||
|
std::cout << "Testing: " << dtb_filename << "\n"; |
||||
|
std::cout << "DTB Discovery: " << (dtb_discovery ? "enabled" : "disabled") << "\n"; |
||||
|
|
||||
|
// Setup simulator
|
||||
|
cfg_t cfg; |
||||
|
std::vector<device_factory_sargs_t> devices; |
||||
|
std::vector<std::string> htif_args{pk, executable}; |
||||
|
debug_module_config_t dm_config; |
||||
|
std::vector<std::pair<reg_t, abstract_mem_t*>> mems; |
||||
|
|
||||
|
sim_t sim(&cfg, false, |
||||
|
mems, |
||||
|
devices, |
||||
|
dtb_discovery, |
||||
|
htif_args, |
||||
|
dm_config, |
||||
|
nullptr, |
||||
|
true, |
||||
|
dtb_path.c_str(), |
||||
|
false, |
||||
|
nullptr, |
||||
|
std::nullopt); |
||||
|
|
||||
|
// Compare devices
|
||||
|
bool result = compare_devices(sim, expected); |
||||
|
|
||||
|
if (result) { |
||||
|
std::cout << "✓ TEST PASSED: " << dtb_filename |
||||
|
<< " (dtb_discovery=" << (dtb_discovery ? "enabled" : "disabled") << ")\n\n"; |
||||
|
} else { |
||||
|
std::cout << "✗ TEST FAILED: " << dtb_filename |
||||
|
<< " (dtb_discovery=" << (dtb_discovery ? "enabled" : "disabled") << ")\n\n"; |
||||
|
} |
||||
|
|
||||
|
return result; |
||||
|
} |
||||
|
|
||||
|
int main(int argc, char **argv) { |
||||
|
if (argc != 4) { |
||||
|
std::cerr << "Usage: " << argv[0] << " --dtb=<file> <pk> <executable>\n"; |
||||
|
return 1; |
||||
|
} |
||||
|
|
||||
|
std::string dtb_path; |
||||
|
std::string pk; |
||||
|
std::string executable; |
||||
|
|
||||
|
// Parse arguments
|
||||
|
int arg_idx = 1; |
||||
|
|
||||
|
// First argument must be --dtb=
|
||||
|
std::string dtb_arg = argv[arg_idx++]; |
||||
|
if (dtb_arg.find("--dtb=") == 0) { |
||||
|
dtb_path = dtb_arg.substr(strlen("--dtb=")); |
||||
|
} else { |
||||
|
std::cerr << "Error: First argument must be --dtb=<file>\n"; |
||||
|
return 1; |
||||
|
} |
||||
|
|
||||
|
// Remaining arguments are pk and executable
|
||||
|
pk = argv[arg_idx++]; |
||||
|
executable = argv[arg_idx]; |
||||
|
|
||||
|
// Run tests with both dtb_discovery values
|
||||
|
bool test_dtb_discovery_disabled = run_test(dtb_path, false, pk, executable); |
||||
|
bool test_dtb_discovery_enabled = run_test(dtb_path, true, pk, executable); |
||||
|
|
||||
|
return !(test_dtb_discovery_disabled && test_dtb_discovery_enabled); |
||||
|
} |
||||
@ -0,0 +1,142 @@ |
|||||
|
#include "dtb_discovery.h" |
||||
|
#include "libfdt.h" |
||||
|
#include "dts.h" |
||||
|
#include <iostream> |
||||
|
#include <sstream> |
||||
|
#include <cstdlib> |
||||
|
|
||||
|
|
||||
|
namespace { |
||||
|
std::vector<std::string> split_csv(const std::string& str) { |
||||
|
std::vector<std::string> result; |
||||
|
std::stringstream ss(str); |
||||
|
std::string item; |
||||
|
while (std::getline(ss, item, ',')) { |
||||
|
result.push_back(item); |
||||
|
} |
||||
|
return result; |
||||
|
} |
||||
|
|
||||
|
std::string join_csv(const std::vector<std::string>& vec) { |
||||
|
std::string result; |
||||
|
for (size_t i = 0; i < vec.size(); ++i) { |
||||
|
result += vec[i]; |
||||
|
if (i < vec.size() - 1) result += ","; |
||||
|
} |
||||
|
return result; |
||||
|
} |
||||
|
|
||||
|
std::vector<std::string> get_device_params(const void* fdt, int offset) { |
||||
|
int param_len; |
||||
|
const char* params = (char*)fdt_getprop(fdt, offset, "spike,plugin-params", ¶m_len); |
||||
|
return params ? split_csv(params) : std::vector<std::string>(); |
||||
|
} |
||||
|
|
||||
|
// Helper to parse reg property
|
||||
|
bool parse_reg_property(const void* fdt, int offset, const char* node_name, |
||||
|
uint64_t& base, uint64_t& size) { |
||||
|
int len = 0; |
||||
|
const fdt32_t* reg_prop = (const fdt32_t*)fdt_getprop(fdt, offset, "reg", &len); |
||||
|
if (!reg_prop) { |
||||
|
fprintf(stderr, "DTB node '%s' missing 'reg' property\n", node_name); |
||||
|
return false; |
||||
|
} |
||||
|
|
||||
|
int addr_cells = fdt_address_cells(fdt, 0); |
||||
|
int size_cells = fdt_size_cells(fdt, 0); |
||||
|
if (addr_cells < 1 || size_cells < 1) { |
||||
|
fprintf(stderr, "Invalid #address-cells or #size-cells for node '%s'\n", node_name); |
||||
|
return false; |
||||
|
} |
||||
|
|
||||
|
int entry_cells = addr_cells + size_cells; |
||||
|
int entry_size = entry_cells * sizeof(fdt32_t); |
||||
|
if ((len % entry_size) != 0) { |
||||
|
fprintf(stderr, "DTB node '%s' has malformed 'reg'\n", node_name); |
||||
|
return false; |
||||
|
} |
||||
|
|
||||
|
const fdt32_t* p = reg_prop; |
||||
|
base = 0; |
||||
|
size = 0; |
||||
|
|
||||
|
// Parse base address
|
||||
|
for (int i = 0; i < addr_cells; ++i) |
||||
|
base = (base << 32) | fdt32_to_cpu(p[i]); |
||||
|
|
||||
|
// Parse size
|
||||
|
for (int i = 0; i < size_cells; ++i) |
||||
|
size = (size << 32) | fdt32_to_cpu(p[addr_cells + i]); |
||||
|
|
||||
|
return true; |
||||
|
} |
||||
|
|
||||
|
// Core platform devices handled by Spike internally
|
||||
|
const std::set<std::string> SPIKE_DEFAULT_DEVICES = { |
||||
|
"riscv,plic0", |
||||
|
"sifive,plic-1.0.0", |
||||
|
"ns16550a", |
||||
|
"riscv,clint0" |
||||
|
}; |
||||
|
|
||||
|
bool should_skip_device(const std::string& device_name) { |
||||
|
return SPIKE_DEFAULT_DEVICES.find(device_name) != SPIKE_DEFAULT_DEVICES.end(); |
||||
|
} |
||||
|
} // namespace
|
||||
|
|
||||
|
namespace dtb_discovery { |
||||
|
|
||||
|
void discover_devices_from_dtb(const void* fdt, |
||||
|
std::vector<device_factory_sargs_t>& factories) { |
||||
|
for (const auto& [device_name, factory] : mmio_device_map()) { |
||||
|
//Spike default devices are not managed by dtb discovery feature
|
||||
|
if (should_skip_device(device_name)) continue; |
||||
|
|
||||
|
int offset = -1; |
||||
|
while ((offset = fdt_node_offset_by_compatible(fdt, offset, device_name.c_str())) >= 0) { |
||||
|
const char* node_name = fdt_get_name(fdt, offset, NULL); |
||||
|
|
||||
|
uint64_t base = 0, size = 0; |
||||
|
if (!parse_reg_property(fdt, offset, node_name, base, size)) { |
||||
|
exit(1); |
||||
|
} |
||||
|
|
||||
|
auto parsed_args = get_device_params(fdt, offset); |
||||
|
|
||||
|
// Prepend base and size to arguments
|
||||
|
std::vector<std::string> full_args; |
||||
|
full_args.push_back(std::to_string(base)); |
||||
|
full_args.push_back(std::to_string(size)); |
||||
|
full_args.insert(full_args.end(), parsed_args.begin(), parsed_args.end()); |
||||
|
|
||||
|
fprintf(stdout, "DTB discovered device: %s - type: %s - base: 0x%016" PRIx64 |
||||
|
" - size: 0x%016" PRIx64 " - params: %s\n", |
||||
|
node_name, device_name.c_str(), base, size, |
||||
|
(parsed_args.empty() ? "" : join_csv(parsed_args).c_str())); |
||||
|
|
||||
|
factories.push_back({factory, full_args}); |
||||
|
} |
||||
|
} |
||||
|
} |
||||
|
|
||||
|
void discover_memory_from_dtb(const void* fdt, |
||||
|
std::vector<std::pair<reg_t, abstract_mem_t*>>& mems) { |
||||
|
int offset = -1; |
||||
|
while ((offset = fdt_node_offset_by_prop_value( |
||||
|
fdt, offset, "device_type", "memory", sizeof("memory"))) >= 0) { |
||||
|
const char* node_name = fdt_get_name(fdt, offset, nullptr); |
||||
|
|
||||
|
uint64_t base = 0, size = 0; |
||||
|
if (!parse_reg_property(fdt, offset, node_name, base, size)) { |
||||
|
exit(1); |
||||
|
} |
||||
|
|
||||
|
fprintf(stdout, |
||||
|
"DTB memory device: %s - Memory initialized at [0x%016" PRIx64 ", 0x%016" PRIx64 ")\n", |
||||
|
node_name, base, base + size); |
||||
|
|
||||
|
mems.emplace_back(base, new mem_t(size)); |
||||
|
} |
||||
|
} |
||||
|
|
||||
|
} // namespace dtb_discovery
|
||||
@ -0,0 +1,21 @@ |
|||||
|
#ifndef _RISCV_DTB_DISCOVERY_H |
||||
|
#define _RISCV_DTB_DISCOVERY_H |
||||
|
|
||||
|
#include "sim.h" |
||||
|
#include <vector> |
||||
|
#include <string> |
||||
|
|
||||
|
class bus_t; |
||||
|
class abstract_mem_t; |
||||
|
|
||||
|
namespace dtb_discovery { |
||||
|
|
||||
|
void discover_devices_from_dtb(const void* fdt, |
||||
|
std::vector<device_factory_sargs_t>& factories); |
||||
|
|
||||
|
void discover_memory_from_dtb(const void* fdt, std::vector<std::pair<reg_t, abstract_mem_t*>>& mems); |
||||
|
|
||||
|
} // namespace dtb_discovery
|
||||
|
|
||||
|
|
||||
|
#endif // _RISCV_DTB_DISCOVERY_H
|
||||
Loading…
Reference in new issue