From 168f52e056a15ca1333ea922d6ca31de8f4d6960 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Tue, 28 Jul 2026 15:27:35 -0700 Subject: [PATCH] Only check instruction-fetch data triggers on complete instructions Signed-off-by: Andrew Waterman --- riscv/mmu.cc | 10 +--------- riscv/mmu.h | 6 ++++++ 2 files changed, 7 insertions(+), 9 deletions(-) diff --git a/riscv/mmu.cc b/riscv/mmu.cc index fa4bf385..0a284a0b 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -137,15 +137,7 @@ mmu_t::insn_parcel_t mmu_t::fetch_slow_path(reg_t vaddr) refill_tlb(vaddr, paddr, (char*)host_addr, FETCH); } - auto res = perform_intrapage_fetch(vaddr, host_addr, paddr); - - if (!check_triggers_fetch) - return res; - - check_triggers(triggers::OPERATION_EXECUTE, vaddr, - access_info.effective_virt, sizeof(insn_parcel_t), res); - - return res; + return perform_intrapage_fetch(vaddr, host_addr, paddr); } static reg_t reg_from_bytes(size_t len, const uint8_t* bytes) diff --git a/riscv/mmu.h b/riscv/mmu.h index 3e8cf4d8..055fbe90 100644 --- a/riscv/mmu.h +++ b/riscv/mmu.h @@ -545,6 +545,12 @@ private: length = insn_length(insn); } + if (check_triggers_fetch) { + auto access_info = generate_access_info(addr, FETCH, {}); + check_triggers(triggers::OPERATION_EXECUTE, addr, + access_info.effective_virt, length, insn); + } + return std::make_tuple(insn, length); }