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Use correct format codes for reg_t and size_t

Fixes 32-bit build.
pull/82/head
Stefan O'Rear 9 years ago
committed by Andrew Waterman
parent
commit
07ff3f3b0b
  1. 6
      riscv/debug_module.cc
  2. 19
      riscv/gdbserver.cc
  3. 4
      riscv/sim.cc

6
riscv/debug_module.cc

@ -19,7 +19,7 @@ bool debug_module_t::load(reg_t addr, size_t len, uint8_t* bytes)
return true;
}
fprintf(stderr, "ERROR: invalid load from debug module: %ld bytes at 0x%016"
fprintf(stderr, "ERROR: invalid load from debug module: %zd bytes at 0x%016"
PRIx64 "\n", len, addr);
return false;
}
@ -29,7 +29,7 @@ bool debug_module_t::store(reg_t addr, size_t len, const uint8_t* bytes)
addr = DEBUG_START + addr;
if (addr & (len-1)) {
fprintf(stderr, "ERROR: unaligned store to debug module: %ld bytes at 0x%016"
fprintf(stderr, "ERROR: unaligned store to debug module: %zd bytes at 0x%016"
PRIx64 "\n", len, addr);
return false;
}
@ -47,7 +47,7 @@ bool debug_module_t::store(reg_t addr, size_t len, const uint8_t* bytes)
return true;
}
fprintf(stderr, "ERROR: invalid store to debug module: %ld bytes at 0x%016"
fprintf(stderr, "ERROR: invalid store to debug module: %zd bytes at 0x%016"
PRIx64 "\n", len, addr);
return false;
}

19
riscv/gdbserver.cc

@ -878,8 +878,8 @@ class memory_write_op_t : public operation_t
if (step == 0) {
access_size = gs.find_access_size(paddr, length);
D(fprintf(stderr, "write to 0x%lx -> 0x%lx (access=%d): ", vaddr, paddr,
access_size));
D(fprintf(stderr, "write to 0x%" PRIx64 " -> 0x%" PRIx64 " (access=%d): ",
vaddr, paddr, access_size));
for (unsigned int i = 0; i < length; i++) {
D(fprintf(stderr, "%02x", data[i]));
}
@ -1032,7 +1032,8 @@ class collect_translation_info_op_t : public operation_t
gs.pte_cache[pte_addr] = ((uint64_t) gs.dr_read32(5) << 32) |
gs.dr_read32(4);
}
D(fprintf(stderr, "pte_cache[0x%lx] = 0x%lx\n", pte_addr, gs.pte_cache[pte_addr]));
D(fprintf(stderr, "pte_cache[0x%" PRIx64 "] = 0x%" PRIx64 "\n", pte_addr,
gs.pte_cache[pte_addr]));
break;
}
@ -1403,7 +1404,7 @@ reg_t gdbserver_t::translate(reg_t vaddr)
reg_t vpn = vaddr >> PGSHIFT;
reg_t paddr = (ppn | (vpn & ((reg_t(1) << ptshift) - 1))) << PGSHIFT;
paddr += vaddr & (PGSIZE-1);
D(fprintf(stderr, "gdbserver translate 0x%lx -> 0x%lx\n", vaddr, paddr));
D(fprintf(stderr, "gdbserver translate 0x%" PRIx64 " -> 0x%" PRIx64 "\n", vaddr, paddr));
return paddr;
}
}
@ -1597,8 +1598,8 @@ void gdbserver_t::write()
// Client can't take any more data right now.
break;
} else {
D(fprintf(stderr, "wrote %ld bytes: ", bytes));
for (unsigned int i = 0; i < bytes; i++) {
D(fprintf(stderr, "wrote %zd bytes: ", bytes));
for (int i = 0; i < bytes; i++) {
D(fprintf(stderr, "%c", send_buf[i]));
}
D(fprintf(stderr, "\n"));
@ -1668,7 +1669,7 @@ void gdbserver_t::process_requests()
if (b == '$') {
// Start of new packet.
if (!packet.empty()) {
fprintf(stderr, "Received malformed %ld-byte packet from debug client: ",
fprintf(stderr, "Received malformed %zd-byte packet from debug client: ",
packet.size());
print_packet(packet);
recv_buf.consume(i);
@ -2080,14 +2081,14 @@ void gdbserver_t::handle_query(const std::vector<uint8_t> &packet)
void gdbserver_t::handle_packet(const std::vector<uint8_t> &packet)
{
if (compute_checksum(packet) != extract_checksum(packet)) {
fprintf(stderr, "Received %ld-byte packet with invalid checksum\n", packet.size());
fprintf(stderr, "Received %zd-byte packet with invalid checksum\n", packet.size());
fprintf(stderr, "Computed checksum: %x\n", compute_checksum(packet));
print_packet(packet);
send("-");
return;
}
D(fprintf(stderr, "Received %ld-byte packet from debug client: ", packet.size()));
D(fprintf(stderr, "Received %zd-byte packet from debug client: ", packet.size()));
D(print_packet(packet));
send("+");

4
riscv/sim.cc

@ -38,8 +38,8 @@ sim_t::sim_t(const char* isa, size_t nprocs, size_t mem_mb, bool halted,
memsz = (size_t)(memsz*0.9)/quantum*quantum;
if (memsz != memsz0)
fprintf(stderr, "warning: only got %lu bytes of target mem (wanted %lu)\n",
(unsigned long)memsz, (unsigned long)memsz0);
fprintf(stderr, "warning: only got %zu bytes of target mem (wanted %zu)\n",
memsz, memsz0);
bus.add_device(DEBUG_START, &debug_module);

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