diff --git a/riscv/mmu.h b/riscv/mmu.h
index c61eb80a..f7bd8ce8 100644
--- a/riscv/mmu.h
+++ b/riscv/mmu.h
@@ -52,14 +52,16 @@ private:
   size_t memsz;
   reg_t badvaddr;
 
-  void check_align(reg_t addr, int size, bool fetch)
+  void check_align(reg_t addr, int size, bool store, bool fetch)
   {
     if(addr & (size-1))
     {
       badvaddr = addr;
       if(fetch)
         throw trap_instruction_address_misaligned;
-      throw trap_data_address_misaligned;
+      if(store)
+        throw trap_store_address_misaligned;
+      throw trap_load_address_misaligned;
     }
   }
 
@@ -76,7 +78,7 @@ private:
 
   void check_align_and_bounds(reg_t addr, int size, bool store, bool fetch)
   {
-    check_align(addr, size, fetch);
+    check_align(addr, size, store, fetch);
     check_bounds(addr, size, store, fetch);
   }
 };
diff --git a/riscv/trap.h b/riscv/trap.h
index 8424d80b..698852c8 100644
--- a/riscv/trap.h
+++ b/riscv/trap.h
@@ -10,7 +10,8 @@
   DECLARE_TRAP(interrupt), \
   DECLARE_TRAP(syscall), \
   DECLARE_TRAP(breakpoint), \
-  DECLARE_TRAP(data_address_misaligned), \
+  DECLARE_TRAP(load_address_misaligned), \
+  DECLARE_TRAP(store_address_misaligned), \
   DECLARE_TRAP(load_access_fault), \
   DECLARE_TRAP(store_access_fault), \
   DECLARE_TRAP(vector_disabled), \