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@ -7,18 +7,16 @@ |
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static void commit_log(state_t* state, reg_t pc, insn_t insn) |
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{ |
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#ifdef RISCV_ENABLE_COMMITLOG |
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if (get_field(state->mstatus, MSTATUS_IE)) { |
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uint64_t mask = (insn.length() == 8 ? uint64_t(0) : (uint64_t(1) << (insn.length() * 8))) - 1; |
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if (state->log_reg_write.addr) { |
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fprintf(stderr, "0x%016" PRIx64 " (0x%08" PRIx64 ") %c%2" PRIu64 " 0x%016" PRIx64 "\n", |
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pc, |
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insn.bits() & mask, |
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state->log_reg_write.addr & 1 ? 'f' : 'x', |
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state->log_reg_write.addr >> 1, |
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state->log_reg_write.data); |
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} else { |
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fprintf(stderr, "0x%016" PRIx64 " (0x%08" PRIx64 ")\n", pc, insn.bits() & mask); |
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} |
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uint64_t mask = (insn.length() == 8 ? uint64_t(0) : (uint64_t(1) << (insn.length() * 8))) - 1; |
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if (state->log_reg_write.addr) { |
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fprintf(stderr, "0x%016" PRIx64 " (0x%08" PRIx64 ") %c%2" PRIu64 " 0x%016" PRIx64 "\n", |
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pc, |
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insn.bits() & mask, |
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state->log_reg_write.addr & 1 ? 'f' : 'x', |
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state->log_reg_write.addr >> 1, |
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state->log_reg_write.data); |
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} else { |
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fprintf(stderr, "0x%016" PRIx64 " (0x%08" PRIx64 ")\n", pc, insn.bits() & mask); |
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} |
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state->log_reg_write.addr = 0; |
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#endif |
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