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==========================================================================
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RISC-V ISA Simulator
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==========================================================================
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# Author : Andrew Waterman, Yunsup Lee
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# Date : June 19, 2011
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# Version : (under version control)
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The RISC-V ISA Simulator implements a functional model of one or more
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RISC-V processors.
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--------------------------------------------------------------------------
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Build Steps
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--------------------------------------------------------------------------
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We assume that the RISCV environment variable is set to the RISC-V tools
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install path, and that the riscv-fesvr package is installed there.
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% mkdir build
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% cd build
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% ../configure --prefix=$RISCV --with-fesvr=$RISCV
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% make
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% [sudo] make install
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--------------------------------------------------------------------------
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Compiling and Running a Simple C Program
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--------------------------------------------------------------------------
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Install spike (see Build Steps), riscv-gcc, and riscv-pk.
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Write a short C program and name it hello.c. Then, compile it into a RISC-V
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ELF binary named hello:
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% riscv-gcc -o hello hello.c
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Now you can simulate the program atop the proxy kernel:
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% spike pk hello
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--------------------------------------------------------------------------
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Simulating a New Instruction
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--------------------------------------------------------------------------
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Adding an instruction to the simulator requires two steps:
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1. Describe the instruction's functional behavior in the file
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riscv/insns/<new_instruction_name>.h. Examine other instructions
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in that directory as a starting point.
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2. Add the opcode and opcode mask to riscv/opcodes.h. Alternatively,
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add it to the riscv-opcodes package, and it will do so for you:
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% cd ../riscv-opcodes
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% vi opcodes // add a line for the new instruction
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% make install
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3. Rebuild the simulator.
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--------------------------------------------------------------------------
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Interactive Debug Mode
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--------------------------------------------------------------------------
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To invoke interactive debug mode, launch spike with -d:
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% spike -d pk hello
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To see the contents of a register (0 is for core 0):
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: reg 0 a0
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To see the contents of a memory location (physical address in hex):
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: mem 2020
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To see the contents of memory with a virtual address (0 for core 0):
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: mem 0 2020
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You can advance by one instruction by pressing <enter>. You can also
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execute until a desired equality is reached:
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: until pc 0 2020 (stop when pc=2020)
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: until mem 2020 50a9907311096993 (stop when mem[2020]=50a9907311096993)
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Alternatively, you can execute as long as an equality is true:
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: while mem 2020 50a9907311096993
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You can continue execution indefinitely by:
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: r
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At any point during execution (even without -d), you can enter the
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interactive debug mode with <control>-<c>.
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To end the simulation from the debug prompt, press <control>-<c> or:
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: q
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