Spike, a RISC-V ISA Simulator
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require_supervisor_hwacha;
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reg_t addr = XS1;
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#define STORE_B(addr, value) \
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p->get_mmu()->store_uint8(addr, value); \
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addr += 1; \
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#define STORE_W(addr, value) \
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p->get_mmu()->store_uint32(addr, value); \
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addr += 4; \
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#define STORE_D(addr, value) \
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p->get_mmu()->store_uint64(addr, value); \
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addr += 8; \
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STORE_W(addr, NXPR);
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STORE_W(addr, NFPR);
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STORE_W(addr, MAXVL);
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STORE_W(addr, VL);
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STORE_W(addr, UTIDX);
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addr += 4;
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STORE_D(addr, VF_PC);
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for (uint32_t x=1; x<NXPR; x++) {
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for (uint32_t i=0; i<VL; i++) {
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STORE_D(addr, UT_READ_XPR(i, x));
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}
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}
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for (uint32_t f=0; f<NFPR; f++) {
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for (uint32_t i=0; i<VL; i++) {
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STORE_D(addr, UT_READ_FPR(i, f));
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}
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}
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for (uint32_t i=0; i<VL; i++) {
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STORE_B(addr, h->get_ut_state(i)->run);
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}
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#undef STORE_B
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#undef STORE_W
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#undef STORE_D
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#include "insns/vxcptkill.h"
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